linux-kernel - RE: [PATCH 0/2] perf: ARM CoreSight PMU support

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Message-ID: <SJ0PR12MB5676B1231F10477AFC96D7BEA0C69@SJ0PR12MB5676.namprd12.prod.outlook.com>
Date:   Mon, 9 May 2022 22:07:36 +0000
From:   Besar Wicaksono <bwicaksono@...dia.com>
To:     Suzuki K Poulose <suzuki.poulose@....com>,
        Will Deacon <will@...nel.org>
CC:     "catalin.marinas@....com" <catalin.marinas@....com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
        "sudeep.holla@....com" <sudeep.holla@....com>,
        "thanu.rangarajan@....com" <thanu.rangarajan@....com>,
        "Michael.Williams@....com" <Michael.Williams@....com>,
        Thierry Reding <treding@...dia.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Vikram Sethi <vsethi@...dia.com>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        "Michael Williams (ATG)" <Michael.Williams@....com>
Subject: RE: [PATCH 0/2] perf: ARM CoreSight PMU support



> -----Original Message-----
> From: Suzuki K Poulose <suzuki.poulose@....com>
> Sent: Monday, May 9, 2022 5:02 AM
> To: Will Deacon <will@...nel.org>; Besar Wicaksono
> <bwicaksono@...dia.com>
> Cc: catalin.marinas@....com; mark.rutland@....com; linux-arm-
> kernel@...ts.infradead.org; linux-kernel@...r.kernel.org; linux-
> tegra@...r.kernel.org; sudeep.holla@....com;
> thanu.rangarajan@....com; Michael.Williams@....com; Thierry Reding
> <treding@...dia.com>; Jonathan Hunter <jonathanh@...dia.com>; Vikram
> Sethi <vsethi@...dia.com>; Mathieu Poirier <mathieu.poirier@...aro.org>;
> Michael Williams (ATG) <Michael.Williams@....com>
> Subject: Re: [PATCH 0/2] perf: ARM CoreSight PMU support
> 
> External email: Use caution opening links or attachments
> 
> 
> Cc: Mike Williams, Mathieu Poirier
> 
> On 09/05/2022 10:28, Will Deacon wrote:
> > On Sun, May 08, 2022 at 07:28:08PM -0500, Besar Wicaksono wrote:
> >> Add driver support for ARM CoreSight PMU device and event attributes
> for NVIDIA
> >> implementation. The code is based on ARM Coresight PMU architecture
> and ACPI ARM
> >> Performance Monitoring Unit table (APMT) specification below:
> >>   * ARM Coresight PMU:
> >>          https://developer.arm.com/documentation/ihi0091/latest
> >>   * APMT: https://developer.arm.com/documentation/den0117/latest
> >>
> >> Notes:
> >>   * There is a concern on the naming of the PMU device.
> >>     Currently the driver is probing "arm-coresight-pmu" device, however
> the APMT
> >>     spec supports different kinds of CoreSight PMU based implementation.
> So it is
> >>     open for discussion if the name can stay or a "generic" name is required.
> >>     Please see the following thread:
> >>     http://lists.infradead.org/pipermail/linux-arm-kernel/2022-
> May/740485.html
> >>
> >> Besar Wicaksono (2):
> >>    perf: coresight_pmu: Add support for ARM CoreSight PMU driver
> >>    perf: coresight_pmu: Add support for NVIDIA SCF and MCF attribute
> >>
> >>   arch/arm64/configs/defconfig                  |    1 +
> >>   drivers/perf/Kconfig                          |    2 +
> >>   drivers/perf/Makefile                         |    1 +
> >>   drivers/perf/coresight_pmu/Kconfig            |   10 +
> >>   drivers/perf/coresight_pmu/Makefile           |    7 +
> >>   .../perf/coresight_pmu/arm_coresight_pmu.c    | 1317
> +++++++++++++++++
> >>   .../perf/coresight_pmu/arm_coresight_pmu.h    |  147 ++
> >>   .../coresight_pmu/arm_coresight_pmu_nvidia.c  |  300 ++++
> >>   .../coresight_pmu/arm_coresight_pmu_nvidia.h  |   17 +
> >>   9 files changed, 1802 insertions(+)
> >
> > How does this interact with all the stuff we have under
> > drivers/hwtracing/coresight/?
> 
> Absolutely zero, except for the name. The standard
> is named "CoreSight PMU" which is a bit unfortunate,
> given the only link, AFAIU, with the "CoreSight" architecture
> is the Lock Access Register(LAR). For reference, the
> drivers/hwtracing/coresight/ is purely "CoreSight" self-hosted
> tracing and the PMU is called "cs_etm" (expands to coresight etm).
> Otherwise the standard doesn't have anything to do with what
> exists already in the kernel.

Yes, there is no correlation or interaction with existing driver for ETM/STM tracing.
It might share same authentication interface (NIDEN, DBGEN, SPIDEN, SPNIDEN)
for external debug. But these are not used in the driver.

> 
> That said, I am concerned that the "coresight_pmu" is easily confused
> with what exists today. Given that this is more of a "PMU" standard
> for the IPs in the Arm world, it would be better to name it as such
> avoiding any confusion with the existing PMUs.
> 
> One potential recommendation for the name is, "Arm PMU"  (The ACPI table
> is named Arm PMU Table). But then that could be clashing with the
> armv8_pmu :-(.
> 
> Some of the other options are :
> 
> "Arm Generic PMU"
> "Arm Uncore PMU"
> "Arm PMU"

As far as I understand, the APMT does not cover PMU in Arm PE.
I think "Arm Uncore PMU" would fit.

Regards,
Besar

> 
> Suzuki
> 
> >
> > Will