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Message-ID: <BYAPR21MB1270DCF4AE2A64520E59235CBFC69@BYAPR21MB1270.namprd21.prod.outlook.com>
Date: Mon, 9 May 2022 23:21:43 +0000
From: Dexuan Cui <decui@...rosoft.com>
To: Jeffrey Hugo <quic_jhugo@...cinc.com>,
KY Srinivasan <kys@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>,
Stephen Hemminger <sthemmin@...rosoft.com>,
"wei.liu@...nel.org" <wei.liu@...nel.org>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"robh@...nel.org" <robh@...nel.org>, "kw@...ux.com" <kw@...ux.com>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>
CC: Jake Oshins <jakeo@...rosoft.com>,
David Zhang <dazhan@...rosoft.com>,
"linux-hyperv@...r.kernel.org" <linux-hyperv@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 2/2] PCI: hv: Fix interrupt mapping for multi-MSI
> From: Jeffrey Hugo <quic_jhugo@...cinc.com>
> Sent: Monday, May 9, 2022 2:48 PM
> ...
> According to Dexuan, the hypervisor folks beleive that multi-msi
> allocations are not correct. compose_msi_msg() will allocate multi-msi
> one by one. However, multi-msi is a block of related MSIs, with alignment
> requirements. In order for the hypervisor to allocate properly aligned
> and consecutive entries in the IOMMU Interrupt Remapping Table, there
> should be a single mapping request that requests all of the multi-msi
> vectors in one shot.
>
> Dexuan suggests detecting the multi-msi case and composing a single
> request related to the first MSI. Then for the other MSIs in the same
> block, use the cached information. This appears to be viable, so do it.
>
> Suggested-by: Dexuan Cui <decui@...rosoft.com>
> Signed-off-by: Jeffrey Hugo <quic_jhugo@...cinc.com>
Reviewed-by: Dexuan Cui <decui@...rosoft.com>
> + if (!msi_desc->pci.msi_attrib.is_msix && msi_desc->nvec_used > 1) {
> + /*
> + * if this is not the first MSI of Multi MSI, we already have
s/if/If
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