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Message-ID: <932f3d62-21d2-dc3c-ff0f-f77477f4e8e9@163.com>
Date:   Mon, 9 May 2022 18:20:18 +0800
From:   qianfan <qianfanguijin@....com>
To:     Maxime Ripard <maxime@...no.tech>
Cc:     linux-sunxi@...ts.linux.dev, Rob Herring <robh+dt@...nel.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        "Rafael J . Wysocki" <rafael@...nel.org>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support



在 2022/5/9 17:27, Maxime Ripard 写道:
> On Mon, May 09, 2022 at 04:48:53PM +0800, qianfanguijin@....com wrote:
>> From: qianfan Zhao <qianfanguijin@....com>
>>
>> OPP table value is get from allwinner lichee 3.10 kernel.
>>
>> Signed-off-by: qianfan Zhao <qianfanguijin@....com>
>> ---
>>   arch/arm/boot/dts/sun8i-r40.dtsi     | 47 ++++++++++++++++++++++++++++
>>   drivers/cpufreq/cpufreq-dt-platdev.c |  1 +
>>   2 files changed, 48 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
>> index 291f4784e86c..90de119095fa 100644
>> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
>> @@ -54,6 +54,41 @@ / {
>>   	#size-cells = <1>;
>>   	interrupt-parent = <&gic>;
>>   
>> +	cpu0_opp_table: opp_table0 {
>> +		compatible = "operating-points-v2";
>> +		opp-shared;
>> +
>> +		opp-720000000 {
>> +			opp-hz = /bits/ 64 <720000000>;
>> +			opp-microvolt = <1000000 1000000 1300000>;
>> +			clock-latency-ns = <2000000>;
>> +		};
>> +
>> +		opp-912000000 {
>> +			opp-hz = /bits/ 64 <912000000>;
>> +			opp-microvolt = <1100000 1100000 1300000>;
>> +			clock-latency-ns = <2000000>;
>> +		};
>> +
>> +		opp-1008000000 {
>> +			opp-hz = /bits/ 64 <1008000000>;
>> +			opp-microvolt = <1160000 1160000 1300000>;
>> +			clock-latency-ns = <2000000>;
>> +		};
>> +
>> +		opp-1104000000 {
>> +			opp-hz = /bits/ 64 <1104000000>;
>> +			opp-microvolt = <1240000 1240000 1300000>;
>> +			clock-latency-ns = <2000000>;
>> +		};
>> +
>> +		opp-1200000000 {
>> +			opp-hz = /bits/ 64 <1200000000>;
>> +			opp-microvolt = <1300000 1300000 1300000>;
>> +			clock-latency-ns = <2000000>;
>> +		};
>> +	};
>> +
> How were these OPPs tested? If you didn't, please test with
> https://github.com/ssvb/cpuburn-arm/blob/master/cpufreq-ljt-stress-test
Thanks for yours guide. Next it the log:
root@...ntu:~/cpuburn-arm-master# ./cpufreq-ljt-stress-test
Creating './whitenoise-1920x1080.jpg' ... done
CPU stress test, which is doing JPEG decoding by libjpeg-turbo
at different cpufreq operating points.

Testing CPU 0
  1200 MHz ............................................................ OK
  1104 MHz ............................................................ OK
  1008 MHz ............................................................ OK
   912 MHz ............................................................ OK
   720 MHz ............................................................ OK

Testing CPU 1
  1200 MHz ............................................................ OK
  1104 MHz ............................................................ OK
  1008 MHz ............................................................ OK
   912 MHz ............................................................ OK
   720 MHz ............................................................ OK

Testing CPU 2
  1200 MHz ............................................................ OK
  1104 MHz ............................................................ OK
  1008 MHz ............................................................ OK
   912 MHz ............................................................ OK
   720 MHz ............................................................ OK

Testing CPU 3
  1200 MHz ............................................................ OK
  1104 MHz ............................................................ OK
  1008 MHz ............................................................ OK
   912 MHz ............................................................ OK
   720 MHz ............................................................ OK

Overall result : PASSED
>
> And report the results
>
> Also, U-Boot sets the 1008MHz OPP by default, and the voltage to match.
> How is this going to play out on device tree where the CPU regulators
> aren't set?
I tested this patch on my custom board now, and cpu is powered by dcdc2.
So I add cpu-supply in dts on my custom board:

&cpu0 {
     cpu-supply = <&reg_dcdc2>;
};

I think I can add cpu-supply to the others.
>
> Maxime

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