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Message-ID: <d4486cd1-e4dc-3120-97ec-dad922bd8430@amd.com>
Date: Mon, 9 May 2022 18:05:53 +0530
From: Ravi Bangoria <ravi.bangoria@....com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: acme@...nel.org, rrichter@....com, mingo@...hat.com,
mark.rutland@....com, jolsa@...nel.org, namhyung@...nel.org,
tglx@...utronix.de, bp@...en8.de, irogers@...gle.com,
yao.jin@...ux.intel.com, james.clark@....com, leo.yan@...aro.org,
kan.liang@...ux.intel.com, ak@...ux.intel.com, eranian@...gle.com,
like.xu.linux@...il.com, x86@...nel.org,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
sandipan.das@....com, ananth.narayan@....com, kim.phillips@....com,
santosh.shukla@....com, Ravi Bangoria <ravi.bangoria@....com>
Subject: Re: [PATCH v2 3/8] perf/amd/ibs: Add support for L3 miss filtering
On 09-May-22 5:35 PM, Peter Zijlstra wrote:
> On Mon, May 09, 2022 at 10:19:09AM +0530, Ravi Bangoria wrote:
>> diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
>> index b06e4c573add..a24b637a6e1d 100644
>> --- a/arch/x86/include/asm/perf_event.h
>> +++ b/arch/x86/include/asm/perf_event.h
>> @@ -391,6 +391,7 @@ struct pebs_xmm {
>> #define IBS_CAPS_OPBRNFUSE (1U<<8)
>> #define IBS_CAPS_FETCHCTLEXTD (1U<<9)
>> #define IBS_CAPS_OPDATA4 (1U<<10)
>> +#define IBS_CAPS_ZEN4IBSEXTENSIONS (1U<<11)
>>
>> #define IBS_CAPS_DEFAULT (IBS_CAPS_AVAIL \
>> | IBS_CAPS_FETCHSAM \
>
> Would you mind terribly if I do:
>
> 's/IBS_CAPS_ZEN4IBSEXTENSIONS/IBS_CAPS_ZEN4/'
>
> on it? Per the IBS_ suffix, we're already talking about IBS, per the
> CAPS thing we're talking about capabilities and I'm thinking that makes
> EXTENTION somewhat redundant, which then leaves:
>
> IBS_CAPS_ZEN4
Yeah, IBS_CAPS_ZEN4 is better. Let me know if you want me to respin.
Thanks,
Ravi
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