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Date:   Mon, 9 May 2022 21:43:50 +0900
From:   Chanwoo Choi <cwchoi00@...il.com>
To:     Johnson Wang <johnson.wang@...iatek.com>, cw00.choi@...sung.com,
        krzk+dt@...nel.org, robh+dt@...nel.org, kyungmin.park@...sung.com
Cc:     khilman@...nel.org, linux-pm@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, jia-wei.chang@...iatek.com,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v3 1/2] dt-bindings: interconnect: Add MediaTek CCI
 dt-bindings

On 22. 5. 9. 21:09, Chanwoo Choi wrote:
> Hi,
> 
> On 22. 4. 25. 21:55, Johnson Wang wrote:
>> Add devicetree binding of MediaTek CCI on MT8183 and MT8186.
>>
>> Signed-off-by: Johnson Wang <johnson.wang@...iatek.com>
>> Signed-off-by: Jia-Wei Chang <jia-wei.chang@...iatek.com>
>> ---
>>   .../bindings/interconnect/mediatek,cci.yaml   | 139 ++++++++++++++++++
>>   1 file changed, 139 insertions(+)
>>   create mode 100644 
>> Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml 
>> b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
>> new file mode 100644
>> index 000000000000..e5221e17d11b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
>> @@ -0,0 +1,139 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/interconnect/mediatek,cci.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: MediaTek Cache Coherent Interconnect (CCI) frequency and 
>> voltage scaling
>> +
>> +maintainers:
>> +  - Jia-Wei Chang <jia-wei.chang@...iatek.com>
> 
> Why did you add your author information?

I'm sorry. I missed 'not' above sentence.
IMHO, please add your author information.

(snip)


-- 
Best Regards,
Samsung Electronics
Chanwoo Choi

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