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Message-ID: <20220509142610.128590-10-conor.dooley@microchip.com>
Date: Mon, 9 May 2022 15:26:10 +0100
From: Conor Dooley <conor.dooley@...rochip.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>
CC: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...osinc.com>,
Albert Ou <aou@...s.berkeley.edu>,
Conor Dooley <conor.dooley@...rochip.com>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Cyril Jean <Cyril.Jean@...rochip.com>,
<devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <heiko@...ech.de>,
Arnd Bergmann <arnd@...db.de>
Subject: [PATCH v5 09/10] riscv: microchip: icicle: readability fixes
Fix the sort order of the status properties, remove some
extra whitespace in the mmc entry & add whitespace to the mac entry
containing the phys so that the dt is easier to read.
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
index 739dfa52bed1..9cd1a30edf2c 100644
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
@@ -64,8 +64,6 @@ &mmuart4 {
};
&mmc {
- status = "okay";
-
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
@@ -77,6 +75,7 @@ &mmc {
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
+ status = "okay";
};
&spi0 {
@@ -106,16 +105,19 @@ &i2c2 {
&mac0 {
phy-mode = "sgmii";
phy-handle = <&phy0>;
+ status = "okay";
};
&mac1 {
- status = "okay";
phy-mode = "sgmii";
phy-handle = <&phy1>;
+ status = "okay";
+
phy1: ethernet-phy@9 {
reg = <9>;
ti,fifo-depth = <0x1>;
};
+
phy0: ethernet-phy@8 {
reg = <8>;
ti,fifo-depth = <0x1>;
--
2.35.2
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