linux-kernel - [PATCH 14/18] EDAC/amd64: Add setup_mci_misc

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20220509145534.44912-15-yazen.ghannam@amd.com>
Date:   Mon, 9 May 2022 14:55:30 +0000
From:   Yazen Ghannam <yazen.ghannam@....com>
To:     <bp@...en8.de>, <linux-edac@...r.kernel.org>
CC:     <linux-kernel@...r.kernel.org>,
        <Smita.KoralahalliChannabasappa@....com>, <muralidhara.mk@....com>,
        <naveenkrishna.chatradhi@....com>,
        Yazen Ghannam <yazen.ghannam@....com>
Subject: [PATCH 14/18] EDAC/amd64: Add setup_mci_misc_attrs() into pvt->ops

From: Muralidhara M K <muralidhara.mk@....com>

GPU Nodes will expose the memory controller attributes differently than
current systems. A function pointer should be used rather than introduce
another branching condition.

Prepare for this by adding setup_mci_misc_attrs() to pvt->ops. Legacy and
modern systems use the same function. A new function will be added for
GPU Nodes.

Signed-off-by: Muralidhara M K <muralidhara.mk@....com>
Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@....com>
[Rebased/reworked patch and reworded commit message]
Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
---
 drivers/edac/amd64_edac.c | 4 +++-
 drivers/edac/amd64_edac.h | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index b99eaa73131e..f1346416e64d 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3768,6 +3768,7 @@ static struct low_ops umc_ops = {
 	.ecc_enabled			= umc_ecc_enabled,
 	.determine_edac_cap		= umc_determine_edac_cap,
 	.determine_edac_ctl_cap		= umc_determine_edac_ctl_cap,
+	.setup_mci_misc_attrs		= setup_mci_misc_attrs,
 };
 
 /* Use Family 16h versions for defaults and adjust as needed below. */
@@ -3783,6 +3784,7 @@ static struct low_ops dct_ops = {
 	.ecc_enabled			= dct_ecc_enabled,
 	.determine_edac_cap		= dct_determine_edac_cap,
 	.determine_edac_ctl_cap		= dct_determine_edac_ctl_cap,
+	.setup_mci_misc_attrs		= setup_mci_misc_attrs,
 };
 
 static int per_family_init(struct amd64_pvt *pvt)
@@ -4001,7 +4003,7 @@ static int init_one_instance(struct amd64_pvt *pvt)
 	mci->pvt_info = pvt;
 	mci->pdev = &pvt->F3->dev;
 
-	setup_mci_misc_attrs(mci);
+	pvt->ops->setup_mci_misc_attrs(mci);
 
 	if (init_csrows(mci))
 		mci->edac_cap = EDAC_FLAG_NONE;
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 15521adec9b5..93de7dea516a 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -476,6 +476,7 @@ struct low_ops {
 	bool (*ecc_enabled)(struct amd64_pvt *pvt);
 	unsigned long (*determine_edac_cap)(struct amd64_pvt *pvt);
 	void (*determine_edac_ctl_cap)(struct mem_ctl_info *mci, struct amd64_pvt *pvt);
+	void (*setup_mci_misc_attrs)(struct mem_ctl_info *mci);
 };
 
 int __amd64_read_pci_cfg_dword(struct pci_dev *pdev, int offset,
-- 
2.25.1