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Message-ID: <CAHk-=wjpkeoyKVf9GVPcddFUDM1+fzFHmoseNZAcqAtjd3D85A@mail.gmail.com>
Date: Tue, 10 May 2022 12:25:17 -0700
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Waiman Long <longman@...hat.com>
Cc: "ying.huang@...el.com" <ying.huang@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
Will Deacon <will@...nel.org>, Aaron Lu <aaron.lu@...el.com>,
Mel Gorman <mgorman@...hsingularity.net>,
kernel test robot <oliver.sang@...el.com>,
Vlastimil Babka <vbabka@...e.cz>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Jesper Dangaard Brouer <brouer@...hat.com>,
Michal Hocko <mhocko@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
LKML <linux-kernel@...r.kernel.org>, lkp@...ts.01.org,
kernel test robot <lkp@...el.com>,
Feng Tang <feng.tang@...el.com>,
Zhengjun Xing <zhengjun.xing@...ux.intel.com>,
fengwei.yin@...el.com
Subject: Re: [mm/page_alloc] f26b3fa046: netperf.Throughput_Mbps -18.0% regression
On Tue, May 10, 2022 at 12:03 PM Linus Torvalds
<torvalds@...ux-foundation.org> wrote:
>
> I think the PV case already basically does that - replacing the the
> "store release" with a much more complex sequence. No?
Looking around, the PV case is absolutely horrid, and does a
cmpxchg_release() on the unlock path. Yeah, that would make the unlock
*much* more expensive.
And I guess that's fairly fundamental. Even if you were to avoid an
explicitly atomic access - do the unlock a non-atomic write followed
by a non-atomic "read pending and see if we need to something
expensive", just that check would have to involve at a minimum a
memory barrier, so it ends up being expensive even for the
non-contended case.
Linus
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