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Message-ID: <20220511152029.GA330075-robh@kernel.org>
Date: Wed, 11 May 2022 10:20:29 -0500
From: Rob Herring <robh@...nel.org>
To: Clément Léger <clement.leger@...tlin.com>
Cc: Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Herve Codina <herve.codina@...tlin.com>,
Miquèl Raynal <miquel.raynal@...tlin.com>,
Milan Stevanovic <milan.stevanovic@...com>,
Jimmy Lalande <jimmy.lalande@...com>,
Pascal Eberhard <pascal.eberhard@...com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH net-next v4 03/12] dt-bindings: net: pcs: add bindings
for Renesas RZ/N1 MII converter
On Mon, May 09, 2022 at 03:18:51PM +0200, Clément Léger wrote:
> This MII converter can be found on the RZ/N1 processor family. The MII
> converter ports are declared as subnodes which are then referenced by
> users of the PCS driver such as the switch.
>
> Signed-off-by: Clément Léger <clement.leger@...tlin.com>
> ---
> .../bindings/net/pcs/renesas,rzn1-miic.yaml | 162 ++++++++++++++++++
> include/dt-bindings/net/pcs-rzn1-miic.h | 33 ++++
> 2 files changed, 195 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
> create mode 100644 include/dt-bindings/net/pcs-rzn1-miic.h
>
> diff --git a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
> new file mode 100644
> index 000000000000..c3f5f772c885
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
> @@ -0,0 +1,162 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/N1 MII converter
> +
> +maintainers:
> + - Clément Léger <clement.leger@...tlin.com>
> +
> +description: |
> + This MII converter is present on the Renesas RZ/N1 SoC family. It is
> + responsible to do MII passthrough or convert it to RMII/RGMII.
> +
> +properties:
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> + compatible:
> + items:
> + - enum:
> + - renesas,r9a06g032-miic
> + - const: renesas,rzn1-miic
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: MII reference clock
> + - description: RGMII reference clock
> + - description: RMII reference clock
> + - description: AHB clock used for the MII converter register interface
> +
> + renesas,miic-switch-portin:
> + description: MII Switch PORTIN configuration. This value should use one of
> + the values defined in dt-bindings/net/pcs-rzn1-miic.h.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [1, 2]
> +
> + power-domains:
> + maxItems: 1
> +
> +patternProperties:
> + "^mii-conv@[0-9]+$":
^mii-conv@[0-5]$
> + type: object
> + description: MII converter port
> +
> + properties:
> + reg:
> + description: MII Converter port number.
> + enum: [1, 2, 3, 4, 5]
> +
> + renesas,miic-input:
> + description: Converter input port configuration. This value should use
> + one of the values defined in dt-bindings/net/pcs-rzn1-miic.h.
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + required:
> + - reg
> + - renesas,miic-input
> +
> + additionalProperties: false
> +
> + allOf:
> + - if:
> + properties:
> + reg:
> + const: 1
> + then:
> + properties:
> + renesas,miic-input:
> + enum: [0]
const: 0
With those fixes,
Reviewed-by: Rob Herring <robh@...nel.org>
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