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Message-ID: <20220511232757.GA829078@bhelgaas>
Date: Wed, 11 May 2022 18:27:57 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@...ux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
Russell Currey <ruscur@...sell.cc>,
Oliver OHalloran <oohall@...il.com>, linux-pci@...r.kernel.org,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] PCI/AER: Handle Multi UnCorrectable/Correctable
errors properly
On Mon, Apr 18, 2022 at 03:02:37PM +0000, Kuppuswamy Sathyanarayanan wrote:
> Currently the aer_irq() handler returns IRQ_NONE for cases without bits
> PCI_ERR_ROOT_UNCOR_RCV or PCI_ERR_ROOT_COR_RCV are set. But this
> assumption is incorrect.
>
> Consider a scenario where aer_irq() is triggered for a correctable
> error, and while we process the error and before we clear the error
> status in "Root Error Status" register, if the same kind of error
> is triggered again, since aer_irq() only clears events it saw, the
> multi-bit error is left in tact. This will cause the interrupt to fire
> again, resulting in entering aer_irq() with just the multi-bit error
> logged in the "Root Error Status" register.
>
> Repeated AER recovery test has revealed this condition does happen
> and this prevents any new interrupt from being triggered. Allow to
> process interrupt even if only multi-correctable (BIT 1) or
> multi-uncorrectable bit (BIT 3) is set.
>
> Also note that, for cases with only multi-bit error is set, since this
> is not the first occurrence of the error, PCI_ERR_ROOT_ERR_SRC may have
> zero or some junk value. So we cannot cleanly process this error
> information using aer_isr_one_error(). All we are attempting with this
> fix is to make sure error interrupt processing can continue in this
> scenario.
>
> This error can be reproduced by making following changes to the
> aer_irq() function and by executing the given test commands.
>
> static irqreturn_t aer_irq(int irq, void *context)
> struct aer_err_source e_src = {};
>
> pci_read_config_dword(rp, aer + PCI_ERR_ROOT_STATUS,
> &e_src.status);
> + pci_dbg(pdev->port, "Root Error Status: %04x\n",
> + e_src.status);
> if (!(e_src.status & AER_ERR_STATUS_MASK))
> return IRQ_NONE;
>
> + mdelay(5000);
>
> # Prep injection data for a correctable error.
> $ cd /sys/kernel/debug/apei/einj
> $ echo 0x00000040 > error_type
> $ echo 0x4 > flags
> $ echo 0x891000 > param4
>
> # Root Error Status is initially clear
> $ setpci -s <Dev ID> ECAP0001+0x30.w
> 0000
>
> # Inject one error
> $ echo 1 > error_inject
>
> # Interrupt received
> pcieport <Dev ID>: AER: Root Error Status 0001
>
> # Inject another error (within 5 seconds)
> $ echo 1 > error_inject
>
> # You will get a new IRQ with only multiple ERR_COR bit set
> pcieport <Dev ID>: AER: Root Error Status 0002
>
> Currently, the above issue has been only reproduced in the ICL server
> platform.
>
> [Eric: proposed reproducing steps]
> Fixes: 4696b828ca37 ("PCI/AER: Hoist aerdrv.c, aer_inject.c up to drivers/pci/pcie/")
4696b828ca37 only *moves* drivers/pci/pcie/aer/aerdrv.c to
drivers/pci/pcie/aer.c, so I don't think it's related.
I think the actual change of interest is e167bfcaa4cd ("PCI: aerdrv:
remove magical ROOT_ERR_STATUS_MASKS") [1]. It looks like we did
exactly what you propose before that commit.
I can update this unless you disagree.
[1] https://git.kernel.org/linus/e167bfcaa4cd
> Reported-by: Eric Badger <ebadger@...estorage.com>
> Reviewed-by: Ashok Raj <ashok.raj@...el.com>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
> ---
>
> Changes since v2:
> * Added more details to the commit log.
> * Rebased on v5.18-rc1.
>
> Changes since v1:
> * Added Fixes tag.
> * Included reproducing steps proposed by Eric.
>
> drivers/pci/pcie/aer.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index 9fa1f97e5b27..7952e5efd6cf 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -101,6 +101,11 @@ struct aer_stats {
> #define ERR_COR_ID(d) (d & 0xffff)
> #define ERR_UNCOR_ID(d) (d >> 16)
>
> +#define AER_ERR_STATUS_MASK (PCI_ERR_ROOT_UNCOR_RCV | \
> + PCI_ERR_ROOT_COR_RCV | \
> + PCI_ERR_ROOT_MULTI_COR_RCV | \
> + PCI_ERR_ROOT_MULTI_UNCOR_RCV)
> +
> static int pcie_aer_disable;
> static pci_ers_result_t aer_root_reset(struct pci_dev *dev);
>
> @@ -1196,7 +1201,7 @@ static irqreturn_t aer_irq(int irq, void *context)
> struct aer_err_source e_src = {};
>
> pci_read_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, &e_src.status);
> - if (!(e_src.status & (PCI_ERR_ROOT_UNCOR_RCV|PCI_ERR_ROOT_COR_RCV)))
> + if (!(e_src.status & AER_ERR_STATUS_MASK))
> return IRQ_NONE;
>
> pci_read_config_dword(rp, aer + PCI_ERR_ROOT_ERR_SRC, &e_src.id);
> --
> 2.25.1
>
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