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Message-ID: <874k1w7aw2.wl-maz@kernel.org>
Date:   Wed, 11 May 2022 09:04:45 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Antonio Borneo <antonio.borneo@...s.st.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        <linux-kernel@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        Loic Pallardy <loic.pallardy@...s.st.com>,
        Ludovic Barre <ludovic.barre@...s.st.com>,
        Pascal Paillet <p.paillet@...s.st.com>
Subject: Re: [PATCH 2/7] irqchip/stm32-exti: manage IMR at each mask/unmask for direct event

On Tue, 10 May 2022 17:41:18 +0100,
Antonio Borneo <antonio.borneo@...s.st.com> wrote:
> 
> From: Loic Pallardy <loic.pallardy@...s.st.com>
> 
> Enable EXTI line through IMR also on direct event.

Notice how none of the words above say *anything* about mask/unmask?
What happens? What breaks? Is it a fix? If so, what does it fix?

	M.

> 
> Signed-off-by: Loic Pallardy <loic.pallardy@...s.st.com>
> Signed-off-by: Antonio Borneo <antonio.borneo@...s.st.com>
> ---
>  drivers/irqchip/irq-stm32-exti.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
> index 10c9c742c216..1145f064faa8 100644
> --- a/drivers/irqchip/irq-stm32-exti.c
> +++ b/drivers/irqchip/irq-stm32-exti.c
> @@ -691,8 +691,8 @@ static struct irq_chip stm32_exti_h_chip_direct = {
>  	.name			= "stm32-exti-h-direct",
>  	.irq_eoi		= irq_chip_eoi_parent,
>  	.irq_ack		= irq_chip_ack_parent,
> -	.irq_mask		= irq_chip_mask_parent,
> -	.irq_unmask		= irq_chip_unmask_parent,
> +	.irq_mask		= stm32_exti_h_mask,
> +	.irq_unmask		= stm32_exti_h_unmask,
>  	.irq_retrigger		= irq_chip_retrigger_hierarchy,
>  	.irq_set_type		= irq_chip_set_type_parent,
>  	.irq_set_wake		= stm32_exti_h_set_wake,
> -- 
> 2.36.0
> 
> 

-- 
Without deviation from the norm, progress is not possible.

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