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Message-ID: <a219c974-a291-7fb5-bdd0-1979d9083eb1@linaro.org>
Date:   Thu, 12 May 2022 16:32:41 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Alexandre Bailon <abailon@...libre.com>, robh+dt@...nel.org,
        krzk+dt@...nel.org, matthias.bgg@...il.com, p.zabel@...gutronix.de
Cc:     rafael@...nel.org, daniel.lezcano@...aro.org, amitk@...nel.org,
        rui.zhang@...el.com, michael.kao@...iatek.com,
        ben.tseng@...iatek.com, ethan.chang@...iatek.com,
        frank-w@...lic-files.de, linux-pm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, khilman@...libre.com,
        Tinghan Shen <tinghan.shen@...iatek.com>
Subject: Re: [PATCH v6 7/7] arm64: dts: mt8195: Add thermal zone

On 12/05/2022 14:24, Alexandre Bailon wrote:
> From: Tinghan Shen <tinghan.shen@...iatek.com>
> 
> This adds the thermal zone for the mt8195.
> 
> Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com>
> Signed-off-by: Ben Tseng <ben.tseng@...iatek.com>
> Signed-off-by: Alexandre Bailon <abailon@...libre.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 103 +++++++++++++++++++++++
>  1 file changed, 103 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 12887fb4d0d1..d6e5b595a89f 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -823,6 +823,21 @@ spi0: spi@...0a000 {
>  			status = "disabled";
>  		};
>  
> +		lvts: lvts@...0b000 {

Generic node names.

> +			compatible = "mediatek,mt8195-lvts";
> +			#thermal-sensor-cells = <1>;
> +			reg = <0 0x1100b000 0 0x1000>,
> +				<0 0x11278000 0 0x1000>;
> +			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>,
> +					<GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
> +			clock-names = "lvts_clk";
> +			resets = <&infracfg_rst 1>,
> +					<&infracfg_rst 2>;
> +			nvmem-cells = <&lvts_e_data1 &lvts_e_data2>;
> +			nvmem-cell-names = "e_data1","e_data2";
> +		};
> +
>  		spi1: spi@...10000 {
>  			compatible = "mediatek,mt8195-spi",
>  				     "mediatek,mt6765-spi";
> @@ -1627,4 +1642,92 @@ vencsys_core1: clock-controller@...00000 {
>  			#clock-cells = <1>;
>  		};
>  	};
> +
> +	thermal_zones: thermal-zones {
> +		cpu_big1 {

No underscores in node names. Generic node names - please open existing
thermal zones schema and look how it is done. This probably fails
validation, so be sure your DTS passes make dtbs_check.

Best regards,
Krzysztof

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