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Message-ID: <20220513190137.GC22683@ranerica-svr.sc.intel.com>
Date: Fri, 13 May 2022 12:01:37 -0700
From: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: x86@...nel.org, Tony Luck <tony.luck@...el.com>,
Andi Kleen <ak@...ux.intel.com>,
Stephane Eranian <eranian@...gle.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Joerg Roedel <joro@...tes.org>,
Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>,
David Woodhouse <dwmw2@...radead.org>,
Lu Baolu <baolu.lu@...ux.intel.com>,
Nicholas Piggin <npiggin@...il.com>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
Ricardo Neri <ricardo.neri@...el.com>,
iommu@...ts.linux-foundation.org, linuxppc-dev@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 12/29] iommu/amd: Enable NMIPass when allocating an
NMI irq
On Fri, May 06, 2022 at 11:26:22PM +0200, Thomas Gleixner wrote:
> On Thu, May 05 2022 at 16:59, Ricardo Neri wrote:
> >
> > + if (info->flags & X86_IRQ_ALLOC_AS_NMI) {
> > + /* Only one IRQ per NMI */
> > + if (nr_irqs != 1)
> > + return -EINVAL;
>
> See previous reply.
I remove this check.
Thanks and BR,
Ricardo
>
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