linux-kernel - Re: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt

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Message-ID: <CA+V-a8vVSnBb66AbAeg4+U-aSaj5BugGQ0FBTZJNdUnb=C641g@mail.gmail.com>
Date:   Fri, 13 May 2022 14:42:04 +0100
From:   "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To:     Biju Das <biju.das.jz@...renesas.com>
Cc:     Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Linus Walleij <linus.walleij@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Phil Edworthy <phil.edworthy@...esas.com>
Subject: Re: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to
 handle GPIO interrupt

On Fri, May 13, 2022 at 7:12 AM Biju Das <biju.das.jz@...renesas.com> wrote:
>
>
>
> > -----Original Message-----
> > From: Biju Das
> > Sent: 12 May 2022 18:59
> > To: Lad, Prabhakar <prabhakar.csengg@...il.com>
> > Cc: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>; Geert
> > Uytterhoeven <geert+renesas@...der.be>; Linus Walleij
> > <linus.walleij@...aro.org>; Thomas Gleixner <tglx@...utronix.de>; Marc
> > Zyngier <maz@...nel.org>; Rob Herring <robh+dt@...nel.org>; Krzysztof
> > Kozlowski <krzysztof.kozlowski+dt@...aro.org>; Bartosz Golaszewski
> > <brgl@...ev.pl>; Philipp Zabel <p.zabel@...gutronix.de>; linux-
> > gpio@...r.kernel.org; linux-kernel@...r.kernel.org; linux-renesas-
> > soc@...r.kernel.org; devicetree@...r.kernel.org; Phil Edworthy
> > <phil.edworthy@...esas.com>
> > Subject: RE: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain
> > to handle GPIO interrupt
> >
> > Hi Prabhakar,
> >
> > > Subject: Re: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ
> > > domain to handle GPIO interrupt
> > >
> > > Hi Biju,
> > >
> > > Thank you for the review.
> > >
> > > On Thu, May 12, 2022 at 6:35 AM Biju Das <biju.das.jz@...renesas.com>
> > > wrote:
> > > >
> > > > Hi Prabhakar,
> > > >
> > > > Thanks for the patch.
> > > >
> > > > > Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>
> > > > > Subject: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ
> > > > > domain to handle GPIO interrupt
> > > > >
> > > > > Add IRQ domian to RZ/G2L pinctrl driver to handle GPIO interrupt.
> > > > >
> > > > > GPIO0-GPIO122 pins can be used as IRQ lines but only 32 pins can
> > > > > be used as IRQ lines at given time. Selection of pins as IRQ lines
> > > > > is handled by IA55 (which is the IRQC block) which sits in between
> > > > > the
> > > GPIO and GIC.
> > > >
> > > > Do we need to update bindings with interrupt-cells on [1] like [2]
> > > > as it
> > > act as parent for GPIO interrupts?
> > > >
> > > Yes interrupt-controller and interrupt-parent needs to be added. I'm
> > > wondering if "interrupt-cells" is not required. If the pin is an
> > > interrupt it will be passed as an GPIO.
> >
> > It is same as external interrupt case right?
> >
> > For eg:- Ethernet PHY case,
> >
> >      interrupt-parent = <&irqc>;
> >      interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> >
> > if you use GPIO, it will be like this right?
> >
> >      interrupt-parent = <&pinctrl>;
> >      interrupts = <RZG2L_GPIO(1, 0) IRQ_TYPE_LEVEL_LOW>;
>
> FYI,
>
> Previously, I have tested ADV HPD interrupt with below changes while investigating [1]
>
> interrupt-parent = <&pinctrl>;
> interrupts = <RZG2L_GPIO(2, 1) IRQ_TYPE_EDGE_FALLING>;
>
Right, #interrupt-cells=<2> , where the first cell is the GPIO pin and
the second cell is the flag.

Cheers,
Prabhakar