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Date: Sun, 15 May 2022 03:24:23 +0530 From: Bhupesh Sharma <bhupesh.sharma@...aro.org> To: linux-arm-msm@...r.kernel.org Cc: bhupesh.sharma@...aro.org, bhupesh.linux@...il.com, linux-kernel@...r.kernel.org, bjorn.andersson@...aro.org, robh@...nel.org Subject: [PATCH v2 5/6] arm64: dts: qcom: Fix 'reg-names' for sdhci nodes Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'reg-names' as various possible combinations are possible for different qcom SoC dts files. Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@...aro.org> Cc: Rob Herring <robh@...nel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org> --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm6125.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 86dbf8ea04bc..45044083faf0 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -792,7 +792,7 @@ pcie_phy: phy@...6000 { sdcc1: mmc@...4000 { compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"; reg = <0x07804000 0x1000>, <0x7805000 0x1000>; - reg-names = "hc", "cqhci"; + reg-names = "hc_mem", "cqe_mem"; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 9076892ff4f8..08f2decc7f4f 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -697,7 +697,7 @@ sdhc_1: mmc@...000 { compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; reg = <0 0x7c4000 0 0x1000>, <0 0x07c5000 0 0x1000>; - reg-names = "hc", "cqhci"; + reg-names = "hc_mem", "cqe_mem"; iommus = <&apps_smmu 0x60 0x0>; interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index e63d1a4499f8..eaaccf0184af 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -866,7 +866,7 @@ sdhc_1: mmc@...000 { reg = <0 0x007c4000 0 0x1000>, <0 0x007c5000 0 0x1000>; - reg-names = "hc", "cqhci"; + reg-names = "hc_mem", "cqe_mem"; iommus = <&apps_smmu 0xc0 0x0>; interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 6d872e2f400a..77dc985b3634 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1275,7 +1275,7 @@ qusb2phy: phy@...2000 { sdhc_2: mmc@...4000 { compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5"; reg = <0x0c084000 0x1000>; - reg-names = "hc"; + reg-names = "hc_mem"; interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; @@ -1330,7 +1330,7 @@ sdhc_1: mmc@...4000 { reg = <0x0c0c4000 0x1000>, <0x0c0c5000 0x1000>, <0x0c0c8000 0x8000>; - reg-names = "hc", "cqhci", "ice"; + reg-names = "hc_mem", "cqe_mem", "ice_mem"; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 77bff81af433..94e427abbfd2 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -438,7 +438,7 @@ rpm_msg_ram: sram@...0000 { sdhc_1: mmc@...4000 { compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5"; reg = <0x04744000 0x1000>, <0x04745000 0x1000>; - reg-names = "hc", "core"; + reg-names = "hc_mem", "core_mem"; interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; @@ -459,7 +459,7 @@ sdhc_1: mmc@...4000 { sdhc_2: mmc@...4000 { compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5"; reg = <0x04784000 0x1000>; - reg-names = "hc"; + reg-names = "hc_mem"; interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 1b1eb884136b..6d959aa0ea94 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -477,7 +477,7 @@ sdhc_1: mmc@...000 { reg = <0 0x007c4000 0 0x1000>, <0 0x007c5000 0 0x1000>, <0 0x007c8000 0 0x8000>; - reg-names = "hc", "cqhci", "ice"; + reg-names = "hc_mem", "cqe_mem", "ice_mem"; interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>; -- 2.35.3
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