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Message-Id: <1652570081.002742.3276245.nullmailer@robh.at.kernel.org>
Date: Sat, 14 May 2022 18:14:40 -0500
From: Rob Herring <robh@...nel.org>
To: Frank Wunderlich <linux@...web.de>
Cc: Michael Riesch <michael.riesch@...fvision.net>,
Vinod Koul <vkoul@...nel.org>,
Johan Jonker <jbx6244@...il.com>,
linux-rockchip@...ts.infradead.org, linux-pci@...r.kernel.org,
Kishon Vijay Abraham I <kishon@...com>,
linux-kernel@...r.kernel.org,
Frank Wunderlich <frank-w@...lic-files.de>,
linux-phy@...ts.infradead.org, Bjorn Helgaas <bhelgaas@...gle.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Peter Geis <pgwipeout@...il.com>,
Heiko Stuebner <heiko@...ech.de>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-kernel@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
Krzysztof WilczyĆski <kw@...ux.com>
Subject: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy
On Sat, 14 May 2022 13:59:42 +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@...lic-files.de>
>
> Add a new binding file for Rockchip PCIe v3 phy driver.
>
> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
>
> ---
> v3:
> - drop quotes
> - drop rk3588
> - make clockcount fixed to 3
> - full path for binding header file
> - drop phy-mode and its header and add lane-map
>
> v2:
> dt-bindings: rename yaml for PCIe v3
> rockchip-pcie3-phy.yaml => rockchip,pcie3-phy.yaml
>
> changes in pcie3 phy yaml
> - change clock names to ordered const list
> - extend pcie30-phymode description
> - add phy-cells to required properties
> - drop unevaluatedProperties
> - example with 1 clock each line
> - use default property instead of text describing it
> - update license
> ---
> .../bindings/phy/rockchip,pcie3-phy.yaml | 82 +++++++++++++++++++
> 1 file changed, 82 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml: properties:clock-names: 'oneOf' conditional failed, one must be fixed:
[{'const': 'refclk_m'}, {'const': 'refclk_n'}, {'const': 'pclk'}] is too long
[{'const': 'refclk_m'}, {'const': 'refclk_n'}, {'const': 'pclk'}] is too short
False schema does not allow 3
1 was expected
3 is greater than the maximum of 2
hint: "minItems" is only needed if less than the "items" list length
from schema $id: http://devicetree.org/meta-schemas/items.yaml#
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml: ignoring, error in schema: properties: clock-names
Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.example.dtb:0:0: /example-0/phy@...c0000: failed to match any schema with compatible: ['rockchip,rk3568-pcie3-phy']
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
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