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Date: Mon, 16 May 2022 21:37:09 +0200
From: Martin Jücker <martin.juecker@...il.com>
To: linux-samsung-soc@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, dri-devel@...ts.freedesktop.org,
Alim Akhtar <alim.akhtar@...sung.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Daniel Vetter <daniel@...ll.ch>,
David Airlie <airlied@...ux.ie>,
Sam Ravnborg <sam@...nborg.org>,
Thierry Reding <thierry.reding@...il.com>,
Martin Jücker <martin.juecker@...il.com>
Subject: [PATCH 3/3] ARM: dts: exynos: add panel and backlight to p4note
Add configuration for the LTL101AL01 panel and a pwm backlight to drive
the display in the p4note devices.
Signed-off-by: Martin Jücker <martin.juecker@...il.com>
---
arch/arm/boot/dts/exynos4412-p4note.dtsi | 84 ++++++++++++++++++++----
1 file changed, 71 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-p4note.dtsi b/arch/arm/boot/dts/exynos4412-p4note.dtsi
index 97f131b1014b..1fd051b52387 100644
--- a/arch/arm/boot/dts/exynos4412-p4note.dtsi
+++ b/arch/arm/boot/dts/exynos4412-p4note.dtsi
@@ -106,6 +106,16 @@ voltage-regulator-3 {
regulator-always-on;
};
+ panel_vdd: voltage-regulator-4 {
+ compatible = "regulator-fixed";
+ regulator-name = "LCD_ENABLE";
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_enable>;
+ gpios = <&gpc0 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+
wlan_pwrseq: sdhci3-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpm3 5 GPIO_ACTIVE_LOW>;
@@ -216,6 +226,32 @@ power_supply: charger@6 {
monitored-battery = <&battery_cell>;
};
};
+
+ panel {
+ compatible = "samsung,ltl101al01";
+ pinctrl-0 = <&lvds_nshdn>;
+ pinctrl-names = "default";
+ power-supply = <&panel_vdd>;
+ enable-gpios = <&gpm0 5 GPIO_ACTIVE_HIGH>;
+ backlight = <&backlight>;
+
+ port {
+ lcd_ep: endpoint {
+ remote-endpoint = <&fimd_ep>;
+ };
+ };
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pinctrl-0 = <&led_bl_reset>;
+ pinctrl-names = "default";
+ enable-gpios = <&gpm0 1 GPIO_ACTIVE_HIGH>;
+ pwms = <&pwm 1 78770 0>;
+ brightness-levels = <0 48 128 255>;
+ num-interpolated-steps = <8>;
+ default-brightness-level = <12>;
+ };
};
&adc {
@@ -295,22 +331,19 @@ &exynos_usbphy {
};
&fimd {
- pinctrl-0 = <&lcd_clk &lcd_data24 &pwm1_out>;
+ pinctrl-0 = <&lcd_clk &lcd_data24>;
pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
- display-timings {
- timing0 {
- clock-frequency = <66666666>;
- hactive = <1280>;
- vactive = <800>;
- hfront-porch = <18>;
- hback-porch = <36>;
- hsync-len = <16>;
- vback-porch = <16>;
- vfront-porch = <4>;
- vsync-len = <3>;
- hsync-active = <1>;
+ samsung,invert-vclk;
+
+ port@3 {
+ reg = <3>;
+
+ fimd_ep: endpoint {
+ remote-endpoint = <&lcd_ep>;
};
};
};
@@ -687,6 +720,12 @@ tsp_reg_gpio_3: tsp-reg-gpio-3-pins {
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
+ lcd_enable: lcd-enable-pins {
+ samsung,pins = "gpc0-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
sleep0: sleep-state {
PIN_SLP(gpa0-0, INPUT, NONE);
PIN_SLP(gpa0-1, OUT0, NONE);
@@ -809,12 +848,24 @@ uart_sel: uart-sel-pins {
/* 0 = CP, 1 = AP (serial output) */
};
+ led_bl_reset: led-bl-reset-pins {
+ samsung,pins = "gpm0-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
tsp_rst: tsp-rst-pins {
samsung,pins = "gpm0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
+ lvds_nshdn: lvds-nshdn-pins {
+ samsung,pins = "gpm0-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
tsp_irq: tsp-irq-pins {
samsung,pins = "gpm2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
@@ -1100,6 +1151,13 @@ &pmu_system_controller {
assigned-clock-parents = <&clock CLK_XUSBXTI>;
};
+&pwm {
+ pinctrl-0 = <&pwm1_out>;
+ pinctrl-names = "default";
+ samsung,pwm-outputs = <1>;
+ status = "okay";
+};
+
&rtc {
clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
clock-names = "rtc", "rtc_src";
--
2.25.1
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