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Message-ID: <20220516061057.GL12339@lst.de>
Date: Mon, 16 May 2022 08:10:57 +0200
From: Christoph Hellwig <hch@....de>
To: Heiko Stuebner <heiko@...ech.de>
Cc: palmer@...belt.com, paul.walmsley@...ive.com,
aou@...s.berkeley.edu, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, wefu@...hat.com,
liush@...winnertech.com, guoren@...nel.org, atishp@...shpatra.org,
anup@...infault.org, drew@...gleboard.org, hch@....de,
arnd@...db.de, wens@...e.org, maxime@...no.tech,
gfavor@...tanamicro.com, andrea.mondelli@...wei.com,
behrensj@....edu, xinhaoqu@...wei.com, mick@....forth.gr,
allen.baum@...erantotech.com, jscheid@...tanamicro.com,
rtrauben@...il.com, samuel@...lland.org, cmuellner@...ux.com,
philipp.tomsich@...ll.eu, Wei Wu <lazyparser@...il.com>,
Daniel Lustig <dlustig@...dia.com>,
Bill Huffman <huffman@...ence.com>
Subject: Re: [PATCH 09/12] riscv: add RISC-V Svpbmt extension support
> +config RISCV_ISA_SVPBMT
> + bool "SVPBMT extension support"
I don't think this prompt is very useful as it doesn't describe
what it does. But do we even want people to disable it as it is
really essentially for a fully functioning kernel and a pity that
it took RISC-V so long to get there?
> + depends on 64BIT && MMU
> + select RISCV_ALTERNATIVE
> + default y
> + help
> + Adds support to dynamically detect the presence of the SVPBMT extension
overly long line here.
> index 5f1046e82d9f..dbfcd9b72bd8 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -14,6 +14,9 @@
> #define ERRATA_SIFIVE_NUMBER 2
> #endif
>
> +#define CPUFEATURE_SVPBMT 0
> +#define CPUFEATURE_NUMBER 1
is errata_list.h really the right place for architectural features?
Otherwise looks good:
Reviewed-by: Christoph Hellwig <hch@....de>
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