[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220516085309.jp5yautmb3veocvl@houat>
Date: Mon, 16 May 2022 10:53:09 +0200
From: Maxime Ripard <maxime@...no.tech>
To: qianfanguijin@....com
Cc: linux-sunxi@...ts.linux.dev, Rob Herring <robh+dt@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH v4 2/2] ARM: dts: sun8i-r40: add opp table for cpu
On Mon, May 16, 2022 at 10:15:16AM +0800, qianfanguijin@....com wrote:
> From: qianfan Zhao <qianfanguijin@....com>
>
> OPP table value is get from allwinner lichee linux-3.10 kernel driver
>
> Signed-off-by: qianfan Zhao <qianfanguijin@....com>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 42 ++++++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 291f4784e86c..8949153eb0eb 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -54,6 +54,36 @@ / {
> #size-cells = <1>;
> interrupt-parent = <&gic>;
>
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-720000000 {
> + opp-hz = /bits/ 64 <720000000>;
> + opp-microvolt = <1000000 1000000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-912000000 {
> + opp-hz = /bits/ 64 <912000000>;
> + opp-microvolt = <1100000 1100000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1008000000 {
> + opp-hz = /bits/ 64 <1008000000>;
> + opp-microvolt = <1160000 1160000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + /* The opp table of the cpu frequency that exceeds 1G
> + * is not defined here. They require higher operating
> + * current, which may exceed the 500mA limited if the
> + * system is powered by USB. You can add them to the
> + * board's DTS is you make sure.
> + */
That's not the issue though. The issue is that the board is setup with a
CPU voltage at 1160mV, and if we raise the frequency to a higher OPP
without raising the voltage as well, the CPU will crash.
Maxime
Powered by blists - more mailing lists