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Message-ID: <4710483.GXAFRqVoOG@diego>
Date:   Mon, 16 May 2022 12:30:55 +0200
From:   Heiko Stübner <heiko@...ech.de>
To:     Christoph Hellwig <hch@....de>,
        Philipp Tomsich <philipp.tomsich@...ll.eu>
Cc:     palmer@...belt.com, paul.walmsley@...ive.com,
        aou@...s.berkeley.edu, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org, wefu@...hat.com,
        liush@...winnertech.com, guoren@...nel.org, atishp@...shpatra.org,
        anup@...infault.org, drew@...gleboard.org, arnd@...db.de,
        wens@...e.org, maxime@...no.tech, gfavor@...tanamicro.com,
        andrea.mondelli@...wei.com, behrensj@....edu, xinhaoqu@...wei.com,
        mick@....forth.gr, allen.baum@...erantotech.com,
        jscheid@...tanamicro.com, rtrauben@...il.com, samuel@...lland.org,
        cmuellner@...ux.com, Wei Wu <lazyparser@...il.com>,
        Daniel Lustig <dlustig@...dia.com>,
        Bill Huffman <huffman@...ence.com>
Subject: Re: [PATCH 09/12] riscv: add RISC-V Svpbmt extension support

Am Montag, 16. Mai 2022, 11:09:12 CEST schrieb Philipp Tomsich:
> On Mon, 16 May 2022 at 08:11, Christoph Hellwig <hch@....de> wrote:
> >
> > > +config RISCV_ISA_SVPBMT
> > > +     bool "SVPBMT extension support"
> >
> > I don't think this prompt is very useful as it doesn't describe
> > what it does.  But do we even want people to disable it as it is
> > really essentially for a fully functioning kernel and a pity that
> > it took RISC-V so long to get there?
> 
> Given that RISC-V is (in some ways) an ISA construction set, there
> will be valid use cases for embedded users to disable this (e.g. if
> they have their own non-standard way to configure these).  So while
> kernels for binary distributions (and desktop, server, or
> general-purpose embedded) will always enable these, I would fully
> expect some users to want to turn these off.

Also, enabling the SVPBMT extension will pull in the alternative-patching
as well of course, and having a way to disable that was a review-request
a version in the past.


> @Heiko: I would request that we have a longer help text on this, which
> explains what it is and ends with the usual "When in doubt, say Y."

ok, will do


> > > +     depends on 64BIT && MMU
> > > +     select RISCV_ALTERNATIVE
> > > +     default y
> > > +     help
> > > +        Adds support to dynamically detect the presence of the SVPBMT extension
> >
> > overly long line here.

will fix together with Philipp's help-text wish


> > > index 5f1046e82d9f..dbfcd9b72bd8 100644
> > > --- a/arch/riscv/include/asm/errata_list.h
> > > +++ b/arch/riscv/include/asm/errata_list.h
> > > @@ -14,6 +14,9 @@
> > >  #define      ERRATA_SIFIVE_NUMBER 2
> > >  #endif
> > >
> > > +#define      CPUFEATURE_SVPBMT 0
> > > +#define      CPUFEATURE_NUMBER 1
> >
> > is errata_list.h really the right place for architectural features?

That probably stems from the alternatives being exclusively used
for erratas in the past.

I guess making this "alternative-list.h" might be a better naming?
Or are there even better suggestions?

> > Otherwise looks good:
> >
> > Reviewed-by: Christoph Hellwig <hch@....de>

Thanks
Heiko



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