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Message-Id: <20220516134734.493065-3-marcel@ziswiler.com>
Date: Mon, 16 May 2022 15:47:12 +0200
From: Marcel Ziswiler <marcel@...wiler.com>
To: linux-arm-kernel@...ts.infradead.org
Cc: Marcel Ziswiler <marcel.ziswiler@...adex.com>,
Fabio Estevam <festevam@...il.com>,
Frank Rowand <frowand.list@...il.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
NXP Linux Team <linux-imx@....com>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Russell King <linux@...linux.org.uk>,
Sascha Hauer <s.hauer@...gutronix.de>,
Shawn Guo <shawnguo@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 02/24] ARM: dts: imx7-colibri: add mdio phy node
From: Marcel Ziswiler <marcel.ziswiler@...adex.com>
Add the MDIO bus with the respective PHY to allow for making changes to
that easier.
While at it also alphabetically re-order properties and improve
indentation.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
---
(no changes since v1)
arch/arm/boot/dts/imx7-colibri.dtsi | 35 ++++++++++++++++++++---------
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index e20b0977f38f..074ebb0f8001 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -83,21 +83,34 @@ &ecspi3 {
};
&fec1 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_enet1>;
- pinctrl-1 = <&pinctrl_enet1_sleep>;
- clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
- <&clks IMX7D_ENET_AXI_ROOT_CLK>,
- <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
- <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;
- clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
- assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
- <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>;
+ assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
+ <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
+ clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
+ clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+ <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+ <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
+ <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;
+ fsl,magic-packet;
+ phy-handle = <ðphy0>;
phy-mode = "rmii";
phy-supply = <®_LDO1>;
- fsl,magic-packet;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_enet1>;
+ pinctrl-1 = <&pinctrl_enet1_sleep>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ max-speed = <100>;
+ micrel,led-mode = <0>;
+ reg = <0>;
+ };
+ };
};
&flexcan1 {
--
2.35.1
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