lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220516134734.493065-17-marcel@ziswiler.com>
Date:   Mon, 16 May 2022 15:47:26 +0200
From:   Marcel Ziswiler <marcel@...wiler.com>
To:     linux-arm-kernel@...ts.infradead.org
Cc:     Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        Fabio Estevam <festevam@...il.com>,
        Frank Rowand <frowand.list@...il.com>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        NXP Linux Team <linux-imx@....com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Russell King <linux@...linux.org.uk>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Shawn Guo <shawnguo@...nel.org>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v2 16/24] ARM: dts: imx7-colibri-aster: add ssp aka spi cs aka ss pins

From: Marcel Ziswiler <marcel.ziswiler@...adex.com>

Add Colibri SSP aka SPI chip select (CS) aka slave select (SS) pins as
either used on Arduino UNO compatible header X18 or Raspberry Pi
compatible header X20.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
---

(no changes since v1)

 arch/arm/boot/dts/imx7-colibri-aster.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index a89c868ff3ed..117965705814 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -7,6 +7,16 @@ &adc1 {
 	status = "okay";
 };
 
+/* Colibri SSP */
+&ecspi3 {
+	cs-gpios = <
+		&gpio4 11 GPIO_ACTIVE_LOW /* SODIMM 86 / regular SSPFRM as UNO_SPI_CS or  */
+		&gpio4 23 GPIO_ACTIVE_LOW /* SODIMM 65 / already muxed pinctrl_gpio2 as SPI_CE0_N */
+		&gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_N */
+	>;
+	status = "okay";
+};
+
 &fec1 {
 	status = "okay";
 };
-- 
2.35.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ