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Message-Id: <20220517154100.29983-2-weijiang.yang@intel.com>
Date: Tue, 17 May 2022 11:40:45 -0400
From: Yang Weijiang <weijiang.yang@...el.com>
To: pbonzini@...hat.com, jmattson@...gle.com, seanjc@...gle.com,
like.xu.linux@...il.com, vkuznets@...hat.com,
kan.liang@...ux.intel.com, wei.w.wang@...el.com,
kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Like Xu <like.xu@...ux.intel.com>,
Peter Zijlstra <peterz@...radead.org>,
Andi Kleen <ak@...ux.intel.com>,
Yang Weijiang <weijiang.yang@...el.com>
Subject: [PATCH v12 01/16] perf/x86/intel: Fix the comment about guest LBR support on KVM
From: Like Xu <like.xu@...ux.intel.com>
Starting from v5.12, KVM reports guest LBR and extra_regs support
when the host has relevant support. Just delete this part of the
comment and fix a typo incidentally.
Cc: Peter Zijlstra <peterz@...radead.org>
Reviewed-by: Kan Liang <kan.liang@...ux.intel.com>
Reviewed-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Like Xu <like.xu@...ux.intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@...el.com>
---
arch/x86/events/intel/core.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index f136be17c1e2..1c70ab856bf4 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6494,8 +6494,7 @@ __init int intel_pmu_init(void)
x86_pmu.intel_ctrl);
/*
* Access LBR MSR may cause #GP under certain circumstances.
- * E.g. KVM doesn't support LBR MSR
- * Check all LBT MSR here.
+ * Check all LBR MSR here.
* Disable LBR access if any LBR MSRs can not be accessed.
*/
if (x86_pmu.lbr_tos && !check_msr(x86_pmu.lbr_tos, 0x3UL))
--
2.27.0
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