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Message-ID: <55093da8-1354-957f-70f1-9db56e0665fc@quicinc.com>
Date:   Tue, 17 May 2022 08:55:29 -0700
From:   Kuogee Hsieh <quic_khsieh@...cinc.com>
To:     Stephen Boyd <swboyd@...omium.org>, <agross@...nel.org>,
        <airlied@...ux.ie>, <bjorn.andersson@...aro.org>,
        <daniel@...ll.ch>, <dianders@...omium.org>,
        <dmitry.baryshkov@...aro.org>, <robdclark@...il.com>,
        <sean@...rly.run>, <vkoul@...nel.org>
CC:     <quic_abhinavk@...cinc.com>, <quic_aravindh@...cinc.com>,
        <quic_sbillaka@...cinc.com>, <freedreno@...ts.freedesktop.org>,
        <dri-devel@...ts.freedesktop.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6] drm/msm/dp: Always clear mask bits to disable
 interrupts at dp_ctrl_reset_irq_ctrl()


On 5/17/2022 1:25 AM, Stephen Boyd wrote:
> Quoting Kuogee Hsieh (2022-05-12 12:43:18)
>> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
>> index af7a80c..f3e333e 100644
>> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
>> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
>> @@ -1389,8 +1389,13 @@ void dp_ctrl_reset_irq_ctrl(struct dp_ctrl *dp_ctrl, bool enable)
>>
>>          dp_catalog_ctrl_reset(ctrl->catalog);
>>
>> -       if (enable)
>> -               dp_catalog_ctrl_enable_irq(ctrl->catalog, enable);
>> +       /*
>> +        * all dp controller programmable registers will not
>> +        * be reset to default value after DP_SW_RESET
>> +        * therefore interrupt mask bits have to be updated
>> +        * to enable/disable interrupts
>> +        */
>> +       dp_catalog_ctrl_enable_irq(ctrl->catalog, enable);
> I think Dmitry requested that this part be split off to a different
> patch. It's fixing the call to dp_ctrl_reset_irq_ctrl() for the disable
> case.
ok, will do that
>>   }
>>
>>   void dp_ctrl_phy_init(struct dp_ctrl *dp_ctrl)
>> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
>> index c388323..ab691aa 100644
>> --- a/drivers/gpu/drm/msm/dp/dp_display.c
>> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
>> @@ -98,6 +98,8 @@ struct dp_display_private {
>>          struct dp_ctrl    *ctrl;
>>          struct dp_debug   *debug;
>>
>> +       bool suspended;
>> +
> Can we not have this flag? I also don't understand how this patch waits
> for the event queue to drain. There are now multiple places we check to
> see if we've suspended, but is it even possible to be in those places
> during suspend? What is wrong with moving to an irq thread? Is it
> because we want to wait for a modeset (EV_USER_NOTIFICATION)?

dp_pm_suspend happen after display off. therefore event q should be 
emptied when dp_pm_suspend called.

since dp_pm_suspend and event_thread share an mutex, if suspended flag 
set at dp_pm_suspend which guarantee

event thread will not be wakeed up to process since event q is empty.

We used event q is to guarantee all events (irqs) are kept in event q 
with timing order (no any events missed) and executed later in timing 
order too to work the scenario likes dongle plug/unplugged several times 
consecutively.

We used to workqueue but cause many synchronization issues.

I will try thread_irq to see it will yield any advantage over kernel thread.

>>          struct dp_usbpd_cb usbpd_cb;
>>          struct dp_display_mode dp_mode;
>>          struct msm_dp dp_display;

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