lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 18 May 2022 00:13:40 +0530
From:   Anand Moon <linux.amoon@...il.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Bartlomiej Zolnierkiewicz <bzolnier@...il.com>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Amit Kucheria <amitk@...nel.org>,
        Zhang Rui <rui.zhang@...el.com>,
        Alim Akhtar <alim.akhtar@...sung.com>,
        Linux PM list <linux-pm@...r.kernel.org>,
        linux-samsung-soc@...r.kernel.org,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCHv2 2/6] thermal: exynos: Reorder the gpu clock
 initialization for exynos5420 SoC

Hi Krzysztof,

On Sun, 15 May 2022 at 15:20, Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> On 15/05/2022 08:41, Anand Moon wrote:
> > Reorder the tmu_gpu clock initialization for exynos5422 SoC.
>
> Some more thoughts: where is the GPU here? This is a TMU driver... In
> subject you also describe GPU.
>

As per the Exynos 5422 clock driver,
CLK_TMU_GPU_APBIF  represents the clock for TMU_GPU
CLK_TMU_APBIF            represents the clock for TMU
hence the subject is GPU-related.

> My comments about unusual code order from [1] were not answered.
>
> https://lore.kernel.org/lkml/CANAwSgS=08fVsqn95WHzSF71WTTyD2-=K2C6-BEz0tY0t6A1-g@mail.gmail.com/T/#m3edd1fa357eb3e921e51eb09e2e32d68496332eb
>
> Please respond/address to all comments before resending.
>
OK, thanks, I have not touched that part of the code in this series
but now I have a better understanding of the TMU drivers.

> Best regards,
> Krzysztof

Thanks & Regards

-Anand

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ