linux-kernel - Re: [PATCH v8 0/4] perf: arm-spe: Decode SPE source and use for perf c2c

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Message-ID: <YoQRg1r7HuwiO3bZ@kernel.org>
Date:   Tue, 17 May 2022 18:20:03 -0300
From:   Arnaldo Carvalho de Melo <acme@...nel.org>
To:     Ali Saidi <alisaidi@...zon.com>, Joe Mario <jmario@...hat.com>
Cc:     linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, german.gomez@....com,
        leo.yan@...aro.org, benh@...nel.crashing.org,
        Nick.Forrington@....com, alexander.shishkin@...ux.intel.com,
        andrew.kilroy@....com, james.clark@....com, john.garry@...wei.com,
        Jiri Olsa <jolsa@...nel.org>, kjain@...ux.ibm.com,
        lihuafei1@...wei.com, mark.rutland@....com,
        mathieu.poirier@...aro.org, mingo@...hat.com, namhyung@...nel.org,
        peterz@...radead.org, will@...nel.org
Subject: Re: [PATCH v8 0/4] perf: arm-spe: Decode SPE source and use for perf
 c2c

Em Tue, May 17, 2022 at 02:03:21AM +0000, Ali Saidi escreveu:
> When synthesizing data from SPE, augment the type with source information
> for Arm Neoverse cores so we can detect situtions like cache line
> contention and transfers on Arm platforms. 
> 
> This changes enables future changes to c2c on a system with SPE where lines that
> are shared among multiple cores show up in perf c2c output. 
> 
> Changes is v9:
>  * Change reporting of remote socket data which should make Leo's upcomping
>    patch set for c2c make sense on multi-socket platforms  

Hey,

	Joe Mario, who is one of 'perf c2c' authors asked me about some
git tree he could clone from for both building the kernel and
tools/perf/ so that he could do tests, can you please provide that?

thanks!

- Arnaldo
 
> Changes in v8:
>  * Report NA for both mem_lvl and mem_lvl_num for stores where we have no
>    information
> 
> Changes in v7:
>  * Minor change requested by Leo Yan
> 
> Changes in v6:
>   * Drop changes to c2c command which will come from Leo Yan
> 
> Changes in v5:
>   * Add a new snooping type to disambiguate cache-to-cache transfers where
>     we don't know if the data is clean or dirty.
>   * Set snoop flags on all the data-source cases
>   * Special case stores as we have no information on them
> 
> Changes in v4:
>   * Bring-in the kernel's arch/arm64/include/asm/cputype.h into tools/ 
>   * Add neoverse-v1 to the neoverse cores list
> 
> Ali Saidi (4):
>   tools: arm64: Import cputype.h
>   perf arm-spe: Use SPE data source for neoverse cores
>   perf mem: Support mem_lvl_num in c2c command
>   perf mem: Support HITM for when mem_lvl_num is any
> 
>  tools/arch/arm64/include/asm/cputype.h        | 258 ++++++++++++++++++
>  .../util/arm-spe-decoder/arm-spe-decoder.c    |   1 +
>  .../util/arm-spe-decoder/arm-spe-decoder.h    |  12 +
>  tools/perf/util/arm-spe.c                     | 110 +++++++-
>  tools/perf/util/mem-events.c                  |  20 +-
>  5 files changed, 383 insertions(+), 18 deletions(-)
>  create mode 100644 tools/arch/arm64/include/asm/cputype.h
> 
> -- 
> 2.32.0

-- 

- Arnaldo