linux-kernel - Re: [PATCH 4/5] dt-bindings: arm: mediatek: Add clock driver bindings for MT6795

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Message-ID: <b3e34db8-4e79-f6e3-35b8-e32891f2c85b@collabora.com>
Date:   Tue, 17 May 2022 09:48:25 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Rob Herring <robh@...nel.org>
Cc:     krzysztof.kozlowski+dt@...aro.org, matthias.bgg@...il.com,
        mturquette@...libre.com, sboyd@...nel.org, p.zabel@...gutronix.de,
        y.oudjana@...tonmail.com, jason-jh.lin@...iatek.com,
        ck.hu@...iatek.com, fparent@...libre.com, rex-bc.chen@...iatek.com,
        tinghan.shen@...iatek.com, chun-jie.chen@...iatek.com,
        weiyi.lu@...iatek.com, ikjn@...omium.org, miles.chen@...iatek.com,
        sam.shih@...iatek.com, wenst@...omium.org,
        bgolaszewski@...libre.com, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-clk@...r.kernel.org,
        konrad.dybcio@...ainline.org, marijn.suijten@...ainline.org,
        martin.botka@...ainline.org, ~postmarketos/upstreaming@...ts.sr.ht,
        phone-devel@...r.kernel.org, paul.bouchara@...ainline.org,
        kernel@...labora.com
Subject: Re: [PATCH 4/5] dt-bindings: arm: mediatek: Add clock driver bindings
 for MT6795

Il 16/05/22 19:28, Rob Herring ha scritto:
> On Fri, May 13, 2022 at 06:50:49PM +0200, AngeloGioacchino Del Regno wrote:
>> Add the bindings for the clock drivers of the MediaTek Helio X10
>> MT6795 SoC.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> ---
>>   .../arm/mediatek/mediatek,mt6795-clock.yaml   | 67 +++++++++++++++++
>>   .../mediatek/mediatek,mt6795-sys-clock.yaml   | 73 +++++++++++++++++++
>>   2 files changed, 140 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt6795-clock.yaml
>>   create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt6795-sys-clock.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt6795-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt6795-clock.yaml
>> new file mode 100644
>> index 000000000000..b7d96d0ed867
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt6795-clock.yaml
>> @@ -0,0 +1,67 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt6795-clock.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: MediaTek Functional Clock Controller for MT6795
>> +
>> +maintainers:
>> +  - AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> +  - Chun-Jie Chen <chun-jie.chen@...iatek.com>
>> +
>> +description: |
>> +  The clock architecture in MediaTek like below
>> +  PLLs -->
>> +          dividers -->
>> +                      muxes
>> +                           -->
>> +                              clock gate
>> +
>> +  The devices provide clock gate control in different IP blocks.
>> +
>> +properties:
>> +  compatible:
>> +    items:
> 
> Don't need 'items' if only 1 item.
> 
>> +      - enum:
>> +          - mediatek,mt6795-mfgcfg
>> +          - mediatek,mt6795-vdecsys
>> +          - mediatek,mt6795-vencsys
> 
> blank line.
> 
>> +  reg:
>> +    maxItems: 1
>> +
>> +  '#clock-cells':
>> +    const: 1
>> +
>> +required:
>> +  - compatible
>> +  - reg
> 
> Why is #clock-cells optional?
> 

I've used one of the other mediatek,mt(something)-(sys-)clock.yaml as a base
for these ones, giving for granted that they were correct, but now that you're
pointing that out... effectively, I should've checked if the ones that are
already merged in were correct *before* using these as a base for mine.

Thanks for your review: I'll send a v2 soon... and I will also separately
send some fixes for the existing ones, as your review comments also apply
to these ones.

Regards,
Angelo