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Message-ID: <9b9df6a3-099f-4368-207f-5fe330e7f166@xen0n.name>
Date: Wed, 18 May 2022 23:54:04 +0800
From: WANG Xuerui <kernel@...0n.name>
To: Huacai Chen <chenhuacai@...ngson.cn>,
Arnd Bergmann <arnd@...db.de>,
Andy Lutomirski <luto@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Peter Zijlstra <peterz@...radead.org>,
Andrew Morton <akpm@...ux-foundation.org>,
David Airlie <airlied@...ux.ie>,
Jonathan Corbet <corbet@....net>,
Linus Torvalds <torvalds@...ux-foundation.org>
Cc: linux-arch@...r.kernel.org, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, Xuefeng Li <lixuefeng@...ngson.cn>,
Yanteng Si <siyanteng@...ngson.cn>,
Huacai Chen <chenhuacai@...il.com>,
Guo Ren <guoren@...nel.org>, Xuerui Wang <kernel@...0n.name>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Stephen Rothwell <sfr@...b.auug.org.au>
Subject: Re: [PATCH V11 07/22] LoongArch: Add atomic/locking headers
On 5/18/22 17:26, Huacai Chen wrote:
> Add common headers (atomic, bitops, barrier and locking) for basic
> LoongArch support.
>
> Signed-off-by: Huacai Chen <chenhuacai@...ngson.cn>
> ---
> arch/loongarch/include/asm/atomic.h | 358 +++++++++++++++++++++++++++
> arch/loongarch/include/asm/barrier.h | 51 ++++
> arch/loongarch/include/asm/bitops.h | 33 +++
> arch/loongarch/include/asm/bitrev.h | 34 +++
> arch/loongarch/include/asm/cmpxchg.h | 121 +++++++++
> arch/loongarch/include/asm/local.h | 138 +++++++++++
> arch/loongarch/include/asm/percpu.h | 20 ++
> 7 files changed, 755 insertions(+)
> create mode 100644 arch/loongarch/include/asm/atomic.h
> create mode 100644 arch/loongarch/include/asm/barrier.h
> create mode 100644 arch/loongarch/include/asm/bitops.h
> create mode 100644 arch/loongarch/include/asm/bitrev.h
> create mode 100644 arch/loongarch/include/asm/cmpxchg.h
> create mode 100644 arch/loongarch/include/asm/local.h
> create mode 100644 arch/loongarch/include/asm/percpu.h
No major problems here so:
Reviewed-by: WANG Xuerui <git@...0n.name>
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