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Message-Id: <20220518063032.2377351-6-tarumizu.kohei@fujitsu.com>
Date: Wed, 18 May 2022 15:30:29 +0900
From: Kohei Tarumizu <tarumizu.kohei@...itsu.com>
To: catalin.marinas@....com, will@...nel.org, tglx@...utronix.de,
mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com,
x86@...nel.org, hpa@...or.com, gregkh@...uxfoundation.org,
rafael@...nel.org, mchehab+huawei@...nel.org, eugenis@...gle.com,
tony.luck@...el.com, pcc@...gle.com, peterz@...radead.org,
marcos@...a.pet, conor.dooley@...rochip.com,
nicolas.ferre@...rochip.com, marcan@...can.st,
linus.walleij@...aro.org, arnd@...db.de,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: tarumizu.kohei@...itsu.com
Subject: [PATCH v4 5/8] arm64: Create cache sysfs directory without ACPI PPTT for hardware prefetch control
Create a cache sysfs directory without ACPI PPTT if the
CONFIG_HWPF_CONTROL is true.
Hardware prefetch control driver need cache sysfs directory and cache
level/type information. In ARM processor, these information can be
obtained from the register even without PPTT.
This patch set the cpu_map_populated to true if the machine doesn't
have PPTT. It use only the level/type information obtained from
CLIDR_EL1, and don't use CCSIDR information.
Signed-off-by: Kohei Tarumizu <tarumizu.kohei@...itsu.com>
---
arch/arm64/kernel/cacheinfo.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c
index 587543c6c51c..039ec32d0b3d 100644
--- a/arch/arm64/kernel/cacheinfo.c
+++ b/arch/arm64/kernel/cacheinfo.c
@@ -43,6 +43,21 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
this_leaf->type = type;
}
+#if defined(CONFIG_HWPF_CONTROL)
+static bool acpi_has_pptt(void)
+{
+ struct acpi_table_header *table;
+ acpi_status status;
+
+ status = acpi_get_table(ACPI_SIG_PPTT, 0, &table);
+ if (ACPI_FAILURE(status))
+ return false;
+
+ acpi_put_table(table);
+ return true;
+}
+#endif
+
int init_cache_level(unsigned int cpu)
{
unsigned int ctype, level, leaves, fw_level;
@@ -95,5 +110,19 @@ int populate_cache_leaves(unsigned int cpu)
ci_leaf_init(this_leaf++, type, level);
}
}
+
+#if defined(CONFIG_HWPF_CONTROL)
+ /*
+ * Hardware prefetch functions need cache sysfs directory and cache
+ * level/type information. In ARM processor, these information can be
+ * obtained from registers even without PPTT. Therefore, we set the
+ * cpu_map_populated to true to create cache sysfs directory, if the
+ * machine doesn't have PPTT.
+ **/
+ if (!acpi_disabled)
+ if (!acpi_has_pptt())
+ this_cpu_ci->cpu_map_populated = true;
+#endif
+
return 0;
}
--
2.27.0
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