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Message-ID: <1614c81e4975c5cfd19c8090d523b16116907389.camel@mediatek.com>
Date: Wed, 18 May 2022 09:13:20 +0800
From: Yong Wu <yong.wu@...iatek.com>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
CC: <joro@...tes.org>, <will@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <matthias.bgg@...il.com>,
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Subject: Re: [PATCH 2/2] iommu: mtk_iommu: Add support for MT6795 Helio X10
M4Us
On Tue, 2022-05-17 at 11:26 +0200, AngeloGioacchino Del Regno wrote:
> Il 17/05/22 11:08, Yong Wu ha scritto:
> > On Fri, 2022-05-13 at 17:14 +0200, AngeloGioacchino Del Regno
> > wrote:
> > > Add support for the M4Us found in the MT6795 Helio X10 SoC.
> > >
> > > Signed-off-by: AngeloGioacchino Del Regno <
> > > angelogioacchino.delregno@...labora.com>
> > > ---
> > > drivers/iommu/mtk_iommu.c | 20 +++++++++++++++++++-
> > > 1 file changed, 19 insertions(+), 1 deletion(-)
[...]
> > > +static const struct mtk_iommu_plat_data mt6795_data = {
> > > + .m4u_plat = M4U_MT6795,
> > > + .flags = HAS_4GB_MODE | HAS_BCLK | RESET_AXI |
> > > + HAS_LEGACY_IVRP_PADDR | MTK_IOMMU_TYPE_MM,
> > > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
> > > + .banks_num = 1,
> > > + .banks_enable = {true},
> > > + .iova_region = single_domain,
> > > + .iova_region_nr = ARRAY_SIZE(single_domain),
> > > + .larbid_remap = {{0}, {1}, {2}, {3}, {4}}, /* Linear mapping.
> > > */
> > > +};
> >
> > This is nearly same with mt8173_data. mt8173 has one more larb than
> > mt6795, its larbid_remap is also ok for mt6795.
> >
>
> I think that we should be explicit about the larbid_remap property,
> since mt6795 has one less larb, we should explicitly say that like
> I did there... that's only for human readability I admit ... but,
> still, I wouldn't want to see people thinking that MT6795 has 6 LARBs
> because they've read that larbid_remap having 6 entries.
In the linear mapping case, It does help. Strictly larbid_remap is two-
dimensional array now, It doesn't indicate how many larbs this SoC
has. If someone would like to know this, he could read the mtxxx-larb-
port.h. We also could document the larb numbers in the binding
for readability.
Anyway, It is not a big problem. A new structure is ok for me. I just
complain there are too many structures, specially in the internal
branch which contains many non-upstream SoCs, and there may be several
IOMMU HWs in one SoC. thus I'd like to group it personally.
>
> > thus it looks we could use mt8173 as the backward compatible.
> > compatible = "mediatek,mt6795-m4u",
> > "mediatek,mt8173-m4u";
> >
> > After this, the only thing is about "mediatek,mt6795-infracfg". we
> > have
> > to try again with mediatek,mt6795-infracfg after mediatek,mt8173-
> > infracfg fail. I think we should allow the backward case in 4GB
> > mode
> > judgment if we have.
> >
> > What's your opinion? or some other suggestion?
> > Thanks.
>
> I know, I may have a plan for that, but I wanted to have a good
> reason to
> propose such a thing, as if it's just about two SoCs needing that,
> there
> would be no good reason to get things done differently.
>
> ...so, in order to provide a good cleanup, we have two possible roads
> to
> follow here: either we add a generic "mediatek,infracfg" compatible
> to the
> infra node (but I don't like that), or we can do it like it was
> previously
> done in mtk-pm-domains.c (I prefer that approach):
>
> iommu: iommu@...ewhere {
> ... something ...
> mediatek,infracfg = <&infracfg>;
We like this too. But this was not suggested from Rob long before.
https://lore.kernel.org/linux-mediatek/20200715205120.GA778876@bogus/
> };
>
> infracfg = syscon_regmap_lookup_by_compatible(node,
> "mediatek,infracfg");
> if (IS_ERR(infracfg)) {
> /* try with the older way */
> switch (...) {
> case .... p = "mediatek,mt2712-infracfg";
> ... blah blah ...
> }
> /* legacy also failed, ouch! */
> if (IS_ERR(infracfg))
> return PTR_ERR(infracfg);
> }
>
> ret = regmap_read ... etc etc etc
>
> Cheers,
> Angelo
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