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Message-ID: <MW4PR12MB5668AA4277ABA5A76CAABB1F96D19@MW4PR12MB5668.namprd12.prod.outlook.com>
Date: Wed, 18 May 2022 12:36:40 +0000
From: "VURDIGERENATARAJ, CHANDAN" <CHANDAN.VURDIGERENATARAJ@....com>
To: Sasha Levin <sashal@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"stable@...r.kernel.org" <stable@...r.kernel.org>
CC: "Yang, Eric" <Eric.Yang2@....com>,
"haonan.wang2@....com" <haonan.wang2@....com>,
"Li, Sun peng (Leo)" <Sunpeng.Li@....com>,
"Pan, Xinhui" <Xinhui.Pan@....com>,
"Siqueira, Rodrigo" <Rodrigo.Siqueira@....com>,
"amd-gfx@...ts.freedesktop.org" <amd-gfx@...ts.freedesktop.org>,
"Koenig, Christian" <Christian.Koenig@....com>,
"airlied@...ux.ie" <airlied@...ux.ie>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"daniel@...ll.ch" <daniel@...ll.ch>,
"wyatt.wood@....com" <wyatt.wood@....com>,
"Deucher, Alexander" <Alexander.Deucher@....com>,
"mikita.lipski@....com" <mikita.lipski@....com>,
"Wentland, Harry" <Harry.Wentland@....com>,
"Kazlauskas, Nicholas" <Nicholas.Kazlauskas@....com>,
"Kotarac, Pavle" <Pavle.Kotarac@....com>
Subject: RE: [PATCH AUTOSEL 5.17 13/23] drm/amd/display: undo clearing of z10
related function pointers
Hi,
Is S0i3 verified for DCN 3.1.6 with this?
BR,
Chandan V N
>From: Eric Yang <Eric.Yang2@....com>
>
>[ Upstream commit 9b9bd3f640640f94272a461b2dfe558f91b322c5 ]
>
> [Why]
>Z10 and S0i3 have some shared path. Previous code clean up , incorrectly removed these pointers, which breaks s0i3 restore
>
> [How]
>Do not clear the function pointers based on Z10 disable.
>
>Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@....com>
>Acked-by: Pavle Kotarac <Pavle.Kotarac@....com>
>Signed-off-by: Eric Yang <Eric.Yang2@....com>
>Signed-off-by: Alex Deucher <alexander.deucher@....com>
>Signed-off-by: Sasha Levin <sashal@...nel.org>
>---
> drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 -----
> 1 file changed, 5 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>index d7559e5a99ce..e708f07fe75a 100644
>--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>@@ -153,9 +153,4 @@ void dcn31_hw_sequencer_construct(struct dc *dc)
> dc->hwss.init_hw = dcn20_fpga_init_hw;
> dc->hwseq->funcs.init_pipes = NULL;
> }
>- if (dc->debug.disable_z10) {
>- /*hw not support z10 or sw disable it*/
>- dc->hwss.z10_restore = NULL;
>- dc->hwss.z10_save_init = NULL;
>- }
> }
>--
>2.35.1
>
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