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Message-ID: <CAHp75VcauAsM2dTsS2CjOTc1_fwd-oT=A+yU6LzQ+vwQRAHjBg@mail.gmail.com>
Date: Thu, 19 May 2022 12:07:23 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Marc Zyngier <maz@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Thomas Gleixner <tglx@...utronix.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
linux-tegra <linux-tegra@...r.kernel.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Phil Edworthy <phil.edworthy@...esas.com>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v4 0/7] Renesas RZ/G2L IRQC support
On Thu, May 19, 2022 at 6:07 AM Lad, Prabhakar
<prabhakar.csengg@...il.com> wrote:
> On Wed, May 18, 2022 at 10:10 PM Andy Shevchenko
> <andy.shevchenko@...il.com> wrote:
> > On Wed, May 18, 2022 at 9:29 PM Lad Prabhakar
> > <prabhakar.mahadev-lad.rj@...renesas.com> wrote:
...
> > > GIC. Out of GPIOINT0-122 only 32 can be mapped to GIC SPI, this mapping is
> > > handled by the pinctrl and IRQC driver.
> >
> > Where is the explanation on why valid_mask can't be used instead?
> >
> The .valid_mask option is one time setting but what I need is
> something dynamic i.e. out of 392 GPIO pins any 32 can be used as an
> interrupt pin. Also with this patch we also save on memory here [0].
Which internal APIs are bound to valid_mask not to be updated?
--
With Best Regards,
Andy Shevchenko
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