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Message-ID: <4031d3a2-9f37-4399-f4b0-8a60d0d8193b@arm.com>
Date: Thu, 19 May 2022 14:42:28 +0100
From: Nick Forrington <nick.forrington@....com>
To: John Garry <john.garry@...wei.com>,
Robin Murphy <robin.murphy@....com>,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
acme@...nel.org
Cc: Will Deacon <will@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Leo Yan <leo.yan@...aro.org>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Andi Kleen <ak@...ux.intel.com>,
Kajol Jain <kjain@...ux.ibm.com>,
James Clark <james.clark@....com>,
Andrew Kilroy <andrew.kilroy@....com>
Subject: Re: [PATCH 00/20] perf vendors events arm64: Multiple Arm CPUs
On 18/05/2022 09:15, John Garry wrote:
> On 17/05/2022 15:32, Robin Murphy wrote:
>>
>> On 2022-05-10 11:47, Nick Forrington wrote:
>>> Add Performance Monitoring Unit event data for the Arm CPUs listed
>>> below.
>>>
>>> Changesets are dependent due to incremental updates to the common
>>> events
>>> file and mapfile.csv.
>>>
>>> Data is sourced from https://github.com/ARM-software/data
>>>
>>> Nick Forrington (20):
>>> perf vendors events arm64: Arm Cortex-A5
>>> perf vendors events arm64: Arm Cortex-A7
>>> perf vendors events arm64: Arm Cortex-A8
>>> perf vendors events arm64: Arm Cortex-A9
>>> perf vendors events arm64: Arm Cortex-A15
>>> perf vendors events arm64: Arm Cortex-A17
>>> perf vendors events arm64: Arm Cortex-A32
>>
>> Obligatory question over anything relating to the above CPUs being in
>> an "arch/arm64" directory... ;)
>
> If we were to add to arm32/arm then the common event numbers and maybe
> other JSONs in future would need to be duplicated.
>
> Would there be any reason to add to arm32/arm apart to from being
> strictly proper? Maybe if lots of other 32b support for other vendors
> came along then it could make sense (to separate them out).
Not that I'm aware of, although I don't have these available to test.
I'm happy to re-submit without these CPUs if it simplifies things.
Thanks,
Nick
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