lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YofCfNsl6O45hYr0@google.com>
Date:   Fri, 20 May 2022 16:31:56 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     "Xu, Yanfei" <yanfei.xu@...el.com>
Cc:     "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "vkuznets@...hat.com" <vkuznets@...hat.com>,
        "wanpengli@...cent.com" <wanpengli@...cent.com>,
        "jmattson@...gle.com" <jmattson@...gle.com>,
        "joro@...tes.org" <joro@...tes.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "bp@...en8.de" <bp@...en8.de>,
        "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
        "x86@...nel.org" <x86@...nel.org>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Wang, Wei W" <wei.w.wang@...el.com>,
        "Liang, Kan" <kan.liang@...el.com>
Subject: Re: [PATCH] KVM: x86: Fix the intel_pt PMI handling wrongly
 considered from guest

Please don't top-post.

On Fri, May 20, 2022, Xu, Yanfei wrote:
> From: Sean Christopherson <seanjc@...gle.com> 
> On Mon, May 16, 2022, Yanfei Xu wrote:
> > diff --git a/arch/x86/include/asm/kvm_host.h 
> > b/arch/x86/include/asm/kvm_host.h index 4ff36610af6a..308cf19f123d 
> > 100644
> > --- a/arch/x86/include/asm/kvm_host.h
> > +++ b/arch/x86/include/asm/kvm_host.h
> > @@ -1582,8 +1582,14 @@ static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
> >  		return -ENOTSUPP;
> >  }
> >  
> > +enum kvm_intr_type {
> > +	/* Values are arbitrary, but must be non-zero. */
> > +	KVM_HANDLING_IRQ = 1,
> > +	KVM_HANDLING_NMI,
> > +};
> > +
> >  #define kvm_arch_pmi_in_guest(vcpu) \
> > -	((vcpu) && (vcpu)->arch.handling_intr_from_guest)
> > +	((vcpu) && (vcpu)->arch.handling_intr_from_guest == 
> > +KVM_HANDLING_NMI)
> 
> My understanding is that this isn't correct as a general change, as perf
> events can use regular IRQs in some cases.  See commit dd60d217062f4 ("KVM:
> x86: Fix perf timer mode IP reporting").
> 
> I assume there's got to be a way to know which mode perf is using, e.g. we
> should be able to make this look something like:
> 
> 	((vcpu) && (vcpu)->arch.handling_intr_from_guest == kvm_pmi_vector)

> Hi Sean,
> You are right, the change of kvm_arch_pmi_in_guest is incorrect, because it should cover two cases of PMI. 
> For the PMI of intel pt, it certainly is the NMI PMI. So how about fixing it like below?

Yep, that works.  I did enough spelunking to figure out how we can fix the generic
issue, but it's per-event and requires a decent amount of plumbing in perf.

perf_guest_handle_intel_pt_intr() doesn't bother with perf_guest_state() since it's
such a specialized event, so fixing this in vmx_handle_intel_pt_intr() would likely
be the long-term solution even if/when the generic case is fixed.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ