lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 20 May 2022 11:10:35 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     Rex-BC Chen <rex-bc.chen@...iatek.com>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>
Cc:     "mturquette@...libre.com" <mturquette@...libre.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        Chun-Jie Chen (陳浚桀) 
        <Chun-Jie.Chen@...iatek.com>,
        Runyang Chen (陈润洋) 
        <Runyang.Chen@...iatek.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        Project_Global_Chrome_Upstream_Group 
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v7 13/19] dt-bindings: reset: mediatek: Add infra_ao reset
 index for MT8192/MT8195

On Fri, May 20, 2022 at 10:58 AM Rex-BC Chen <rex-bc.chen@...iatek.com> wrote:
>
> On Thu, 2022-05-19 at 20:55 +0800, Rex-BC Chen wrote:
> > To support reset of infra_ao, add the index of infra_ao reset of
> > thermal/svs/pcei for MT8192 and thermal/svs for MT8195.
> >
> > Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@...labora.com>
> > ---
> >  include/dt-bindings/reset/mt8192-resets.h | 8 ++++++++
> >  include/dt-bindings/reset/mt8195-resets.h | 6 ++++++
> >  2 files changed, 14 insertions(+)
> >
> > diff --git a/include/dt-bindings/reset/mt8192-resets.h b/include/dt-
> > bindings/reset/mt8192-resets.h
> > index 764ca9910fa9..12e2087c90a3 100644
> > --- a/include/dt-bindings/reset/mt8192-resets.h
> > +++ b/include/dt-bindings/reset/mt8192-resets.h
> > @@ -7,6 +7,7 @@
> >  #ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8192
> >  #define _DT_BINDINGS_RESET_CONTROLLER_MT8192
> >
> > +/* TOPRGU resets */
> >  #define MT8192_TOPRGU_MM_SW_RST
> > 1
> >  #define MT8192_TOPRGU_MFG_SW_RST                             2
> >  #define MT8192_TOPRGU_VENC_SW_RST                            3
> > @@ -30,4 +31,11 @@
> >  /* MMSYS resets */
> >  #define MT8192_MMSYS_SW0_RST_B_DISP_DSI0                     15
> >
> > +/* INFRA resets */
> > +#define MT8192_INFRA_RST0_THERM_CTRL_SWRST           0
> > +#define MT8192_INFRA_RST2_PEXTP_PHY_SWRST            1
> > +#define MT8192_INFRA_RST3_THERM_CTRL_PTP_SWRST       2
> > +#define MT8192_INFRA_RST4_PCIE_TOP_SWRST             3
> > +#define MT8192_INFRA_RST4_THERM_CTRL_MCU_SWRST       4
> > +
> >  #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */
> > diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-
> > bindings/reset/mt8195-resets.h
> > index a26bccc8b957..0b1937f14b36 100644
> > --- a/include/dt-bindings/reset/mt8195-resets.h
> > +++ b/include/dt-bindings/reset/mt8195-resets.h
> > @@ -7,6 +7,7 @@
> >  #ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
> >  #define _DT_BINDINGS_RESET_CONTROLLER_MT8195
> >
> > +/* TOPRGU resets */
> >  #define MT8195_TOPRGU_CONN_MCU_SW_RST          0
> >  #define MT8195_TOPRGU_INFRA_GRST_SW_RST        1
> >  #define MT8195_TOPRGU_APU_SW_RST               2
> > @@ -26,4 +27,9 @@
> >
> >  #define MT8195_TOPRGU_SW_RST_NUM               16
> >
> > +/* INFRA resets */
> > +#define MT8195_INFRA_RST0_THERM_CTRL_SWRST     0
> > +#define MT8195_INFRA_RST3_THERM_CTRL_PTP_SWRST 1
> > +#define MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST 2
> > +
> >  #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
> > --
> > 2.18.0
> >
>
> Hello Stephen,
>
> this patch will have conflict with Matthias's commit branch for
> include/dt-bindings/reset/mt8192-resets.h.
>
> It's on linux-next.
>
> I have fix it in this version, but I think there will be a merge
> conflict if you pick my series in this run.
>
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/include/dt-bindings/reset/mt8192-resets.h?h=next-20220519&id=19c66219e4d5b813ebbd28621cfe9c450659ded7

The commit in question is in Matthias's v5.18-next/dts64 branch, which also
has the v5.18-next-dts64 tag. The PR for this tag was already picked up
by the soc maintainers, so I guess we could consider it stable.

Matthias, what do you think? Give an ack for the patch to go through the
clk tree with the tag merged in as dependency? There's a compile time
dependency between this and the next patch so we can't just split them
into different trees.


ChenYu

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ