linux-kernel - Re: [PATCH net-next v5 11/13] ARM: dts: r9a06g032: describe GMAC2

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Message-ID: <CAMuHMdXTrZnGVt44hg5QUvuS5cZABmRncgNYtatkmk8VcH7gew@mail.gmail.com>
Date:   Fri, 20 May 2022 10:25:37 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Clément Léger <clement.leger@...tlin.com>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Herve Codina <herve.codina@...tlin.com>,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Milan Stevanovic <milan.stevanovic@...com>,
        Jimmy Lalande <jimmy.lalande@...com>,
        Pascal Eberhard <pascal.eberhard@...com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        netdev <netdev@...r.kernel.org>
Subject: Re: [PATCH net-next v5 11/13] ARM: dts: r9a06g032: describe GMAC2

Hi Clément,

On Fri, May 20, 2022 at 10:14 AM Clément Léger
<clement.leger@...tlin.com> wrote:
> Le Fri, 20 May 2022 09:18:58 +0200,
> Geert Uytterhoeven <geert@...ux-m68k.org> a écrit :
> > On Thu, May 19, 2022 at 5:32 PM Clément Léger <clement.leger@...tlin.com> wrote:
> > > RZ/N1 SoC includes two MAC named GMACx that are compatible with the
> > > "snps,dwmac" driver. GMAC1 is connected directly to the MII converter
> > > port 1. GMAC2 however can be used as the MAC for the switch CPU
> > > management port or can be muxed to be connected directly to the MII
> > > converter port 2. This commit add description for the GMAC2 which will
> > > be used by the switch description.
> > >
> > > Signed-off-by: Clément Léger <clement.leger@...tlin.com>

> > > --- a/arch/arm/boot/dts/r9a06g032.dtsi
> > > +++ b/arch/arm/boot/dts/r9a06g032.dtsi
> > > @@ -200,6 +200,23 @@ nand_controller: nand-controller@...02000 {
> > >                         status = "disabled";
> > >                 };
> > >
> > > +               gmac2: ethernet@...02000 {
> > > +                       compatible = "snps,dwmac";
> >
> > Does this need an SoC-specific compatible value?
>
> Indeed, it might be useful to introduce a specific SoC compatible since
> in a near future, there might be some specific support for that gmac.
> Here is an overview of the gmac connection on the SoC:
>
>                                           ┌─────────┐   ┌──────────┐
>                                           │         │   │          │
>                                           │  GMAC2  │   │  GMAC1   │
>                                           │         │   │          │
>                                           └───┬─────┘   └─────┬────┘
>                                               │               │
>                                               │               │
>                                               │               │
>                                          ┌────▼──────┐        │
>                                          │           │        │
>             ┌────────────────────────────┤  SWITCH   │        │
>             │                            │           │        │
>             │          ┌─────────────────┴─┬────┬────┘        │
>             │          │            ┌──────┘    │             │
>             │          │            │           │             │
>        ┌────▼──────────▼────────────▼───────────▼─────────────▼────┐
>        │                      MII Converter                        │
>        │                                                           │
>        │                                                           │
>        │ port 1      port 2       port 3      port 4       port 5  │
>        └───────────────────────────────────────────────────────────┘
>
> As you can see, the GMAC1 is directly connected to MIIC converter and
> thus will need a "pcs-handle" property to point on the MII converter
> port whereas the GMAC2 is directly connected to the switch in GMII.
>
> Is "renesas,r9a06g032-gmac2", "renesas,rzn1-switch-gmac2" looks ok for
> you for this one ?

Why "switch" in the family-specific value, but not in the SoC-specific
value?

Are GMAC1 and GMAC2 really different, or are they identical, and is
the only difference in the wiring, which can be detected at run-time
using this "pcs-handle" property? If they're identical, they should
use the same compatible value.

Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds