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Date:   Fri, 20 May 2022 07:32:06 -0700
From:   matthew.gerlach@...ux.intel.com
To:     dinguyen@...nel.org, robh+dt@...nel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        krzysztof.kozlowski+dt@...aro.org
Cc:     Matthew Gerlach <matthew.gerlach@...ux.intel.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v6 1/3] dt-bindings: soc: add bindings for Intel HPS Copy Engine

From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>

Add device tree bindings documentation for the Intel Hard
Processor System (HPS) Copy Engine.

Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
v6:
  - move from soc/intel to the dma directory
  - remove unnecessary parent device tree node from example

v5:
  - add Reviewed-by: Krzysztof Kozlowski

v4:
  - move from soc to soc/intel/

v3:
  - remove unused label
  - move from misc to soc
  - remove 0x from #address-cells/#size-cells values
  - change hps_cp_eng@0 to dma-controller@0
  - remote inaccurate 'items:' tag
---
 .../bindings/dma/intel,hps-copy-engine.yaml   | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dma/intel,hps-copy-engine.yaml

diff --git a/Documentation/devicetree/bindings/dma/intel,hps-copy-engine.yaml b/Documentation/devicetree/bindings/dma/intel,hps-copy-engine.yaml
new file mode 100644
index 000000000000..6332305db1de
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/intel,hps-copy-engine.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (C) 2022, Intel Corporation
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/dma/intel,hps-copy-engine.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel HPS Copy Engine
+
+maintainers:
+  - Matthew Gerlach <matthew.gerlach@...ux.intel.com>
+
+description: |
+  The Intel Hard Processor System (HPS) Copy Engine is an IP block used to copy
+  a bootable image from host memory to HPS DDR.  Additionally, there is a
+  register the HPS can use to indicate the state of booting the copied image as
+  well as a keep-a-live indication to the host.
+
+properties:
+  compatible:
+    const: intel,hps-copy-engine
+
+  '#dma-cells':
+    const: 1
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    dma-controller@0 {
+        compatible = "intel,hps-copy-engine";
+        reg = <0x00000000 0x00001000>;
+        #dma-cells = <1>;
+    };
-- 
2.25.1

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