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Message-ID: <874k1kkydk.fsf@baylibre.com>
Date: Fri, 20 May 2022 17:38:31 +0200
From: Mattijs Korpershoek <mkorpershoek@...libre.com>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
dmitry.torokhov@...il.com
Cc: matthias.bgg@...il.com, angelogioacchino.delregno@...labora.com,
linux-input@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/5] Input: mtk-pmic-keys - Transfer per-key bit in
mtk_pmic_keys_regs
On ven., mai 20, 2022 at 14:51, AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com> wrote:
> Place the key bit in struct mtk_pmic_keys_regs to enhance this
> driver's flexibility, in preparation for adding support for more
> PMICs.
>
> While at it, also remove the *_MASK and *_SHIFT definitions, as
> these can be simply expressed as BIT(x), and "slightly rename"
> the MTK_PMIC_{HOME,PWR}KEY_RST macro to better reflect the real
> name for these bits.
>
> This commit brings no functional changes.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@...libre.com>
> ---
> drivers/input/keyboard/mtk-pmic-keys.c | 46 ++++++++++++++------------
> 1 file changed, 25 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c
> index 83d0b90cc8cb..d8285612265f 100644
> --- a/drivers/input/keyboard/mtk-pmic-keys.c
> +++ b/drivers/input/keyboard/mtk-pmic-keys.c
> @@ -18,17 +18,11 @@
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
>
> -#define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1
> -#define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6
> -#define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1
> -#define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5
> #define MTK_PMIC_RST_DU_MASK 0x3
> #define MTK_PMIC_RST_DU_SHIFT 8
>
> -#define MTK_PMIC_PWRKEY_RST \
> - (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT)
> -#define MTK_PMIC_HOMEKEY_RST \
> - (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT)
> +#define MTK_PMIC_MT6397_HOMEKEY_RST_EN BIT(5)
> +#define MTK_PMIC_MT6397_PWRKEY_RST_EN BIT(6)
>
> #define MTK_PMIC_PWRKEY_INDEX 0
> #define MTK_PMIC_HOMEKEY_INDEX 1
> @@ -40,21 +34,24 @@
> * @deb_mask: Bitmask of this key in status register
> * @intsel_reg: Interrupt selector register
> * @intsel_mask: Bitmask of this key in interrupt selector
> + * @rst_en_mask: Bitmask of this key in PMIC keys reset register
> */
> struct mtk_pmic_keys_regs {
> u32 deb_reg;
> u32 deb_mask;
> u32 intsel_reg;
> u32 intsel_mask;
> + u32 rst_en_mask;
> };
>
> #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
> - _intsel_reg, _intsel_mask) \
> + _intsel_reg, _intsel_mask, _rst_mask) \
> { \
> .deb_reg = _deb_reg, \
> .deb_mask = _deb_mask, \
> .intsel_reg = _intsel_reg, \
> .intsel_mask = _intsel_mask, \
> + .rst_en_mask = _rst_mask, \
> }
>
> /**
> @@ -70,30 +67,32 @@ struct mtk_pmic_regs {
> static const struct mtk_pmic_regs mt6397_regs = {
> .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
> MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
> - 0x8, MT6397_INT_RSV, 0x10),
> + 0x8, MT6397_INT_RSV, 0x10, MTK_PMIC_MT6397_PWRKEY_RST_EN),
> .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
> MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
> - 0x10, MT6397_INT_RSV, 0x8),
> + 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_MT6397_HOMEKEY_RST_EN),
> .pmic_rst_reg = MT6397_TOP_RST_MISC,
> };
>
> static const struct mtk_pmic_regs mt6323_regs = {
> .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
> MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
> - 0x2, MT6323_INT_MISC_CON, 0x10),
> + 0x2, MT6323_INT_MISC_CON, 0x10, MTK_PMIC_MT6397_PWRKEY_RST_EN),
> .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
> MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
> - 0x4, MT6323_INT_MISC_CON, 0x8),
> + 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_MT6397_HOMEKEY_RST_EN),
> .pmic_rst_reg = MT6323_TOP_RST_MISC,
> };
>
> static const struct mtk_pmic_regs mt6358_regs = {
> .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
> MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
> - 0x2, MT6358_PSC_TOP_INT_CON0, 0x5),
> + 0x2, MT6358_PSC_TOP_INT_CON0, 0x5,
> + MTK_PMIC_MT6397_PWRKEY_RST_EN),
> .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
> MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
> - 0x8, MT6358_PSC_TOP_INT_CON0, 0xa),
> + 0x8, MT6358_PSC_TOP_INT_CON0, 0xa,
> + MTK_PMIC_MT6397_HOMEKEY_RST_EN),
> .pmic_rst_reg = MT6358_TOP_RST_MISC,
> };
>
> @@ -140,6 +139,11 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
> {
> int ret;
> u32 long_press_mode, long_press_debounce;
> + const struct mtk_pmic_keys_regs *kregs_pwr;
> + const struct mtk_pmic_keys_regs *kregs_home;
> +
> + kregs_pwr = keys->keys[MTK_PMIC_PWRKEY_INDEX].regs;
> + kregs_home = keys->keys[MTK_PMIC_HOMEKEY_INDEX].regs;
>
> ret = of_property_read_u32(keys->dev->of_node,
> "power-off-time-sec", &long_press_debounce);
> @@ -157,16 +161,16 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
>
> switch (long_press_mode) {
> case LP_ONEKEY:
> - regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST);
> - regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST);
> + regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask);
> + regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask);
> break;
> case LP_TWOKEY:
> - regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST);
> - regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST);
> + regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask);
> + regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask);
> break;
> case LP_DISABLE:
> - regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST);
> - regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST);
> + regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask);
> + regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask);
> break;
> default:
> break;
> --
> 2.35.1
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