linux-kernel - Re: [PATCH v5 06/10] i2c: npcm: Correct register access width

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Message-ID: <Yoh+RUTtmiQsrCg3@shikoro>
Date:   Sat, 21 May 2022 07:53:09 +0200
From:   Wolfram Sang <wsa@...nel.org>
To:     Tyrone Ting <warp5tw@...il.com>
Cc:     avifishman70@...il.com, tmaimon77@...il.com, tali.perry1@...il.com,
        venture@...gle.com, yuenn@...gle.com, benjaminfair@...gle.com,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        andriy.shevchenko@...ux.intel.com, jarkko.nikula@...ux.intel.com,
        semen.protsenko@...aro.org, rafal@...ecki.pl, sven@...npeter.dev,
        jsd@...ihalf.com, jie.deng@...el.com, lukas.bulwahn@...il.com,
        arnd@...db.de, olof@...om.net, tali.perry@...oton.com,
        Avi.Fishman@...oton.com, tomer.maimon@...oton.com,
        KWLIU@...oton.com, JJLIU0@...oton.com, kfting@...oton.com,
        openbmc@...ts.ozlabs.org, linux-i2c@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 06/10] i2c: npcm: Correct register access width

On Tue, May 17, 2022 at 06:11:38PM +0800, Tyrone Ting wrote:
> From: Tyrone Ting <kfting@...oton.com>
> 
> The SMBnCTL3 register is 8-bit wide and the 32-bit access was always
> incorrect, but simply didn't cause a visible error on the 32-bit machine.
> 
> On the 64-bit machine, the kernel message reports that ESR value is
> 0x96000021. Checking Arm Architecture Reference Manual Armv8 suggests that
> it's the alignment fault.
> 
> SMBnCTL3's address is 0xE.
> 
> Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
> Signed-off-by: Tyrone Ting <kfting@...oton.com>
> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@....net>

Applied to for-next, thanks!


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