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Message-ID: <20220521124910.GA13556@wunner.de>
Date: Sat, 21 May 2022 14:49:10 +0200
From: Lukas Wunner <lukas@...ner.de>
To: Sheng Bi <windy.bi.enflame@...il.com>
Cc: Bjorn Helgaas <helgaas@...nel.org>,
Alex Williamson <alex.williamson@...hat.com>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] PCI: Fix no-op wait after secondary bus reset
On Sat, May 21, 2022 at 04:36:10PM +0800, Sheng Bi wrote:
> If so, I also want to align the polling things mentioned in the
> question from Alex, since pci_dev_wait() is also used for reset
> functions other than SBR. To Bjorn, Alex, Lucas, how do you think if
> we need to change the polling in pci_dev_wait() to 20ms intervals, or
> keep binary exponential back-off with probable unexpected extra
> timeout delay.
The exponential backoff should probably be capped at some point
to avoid excessive wait delays. I guess the rationale for
exponential backoff is to not poll too frequently.
Capping at 20 msec or 100 msec may be reasonable, i.e.:
- delay *= 2;
+ delay = min(delay * 2, 100);
Thanks,
Lukas
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