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Message-ID: <20220523060056.24396-10-rex-bc.chen@mediatek.com>
Date: Mon, 23 May 2022 14:00:46 +0800
From: Rex-BC Chen <rex-bc.chen@...iatek.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<matthias.bgg@...il.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>
CC: <p.zabel@...gutronix.de>,
<angelogioacchino.delregno@...labora.com>,
<nfraprado@...labora.com>, <chun-jie.chen@...iatek.com>,
<wenst@...omium.org>, <runyang.chen@...iatek.com>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
Rex-BC Chen <rex-bc.chen@...iatek.com>
Subject: [PATCH v8 09/19] clk: mediatek: reset: Change return type for clock reset register function
To deal with error handling, we change the function return type from
void to int for mtk_clk_register_rst_ctrl().
Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Reviewed-by: NĂcolas F. R. A. Prado <nfraprado@...labora.com>
Tested-by: NĂcolas F. R. A. Prado <nfraprado@...labora.com>
---
drivers/clk/mediatek/reset.c | 15 +++++++++------
drivers/clk/mediatek/reset.h | 6 ++++--
2 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c
index 89e617ea6393..b9718f0f9d16 100644
--- a/drivers/clk/mediatek/reset.c
+++ b/drivers/clk/mediatek/reset.c
@@ -110,8 +110,8 @@ static int reset_xlate(struct reset_controller_dev *rcdev,
return data->desc->rst_idx_map[reset_spec->args[0]];
}
-void mtk_register_reset_controller(struct device_node *np,
- const struct mtk_clk_rst_desc *desc)
+int mtk_register_reset_controller(struct device_node *np,
+ const struct mtk_clk_rst_desc *desc)
{
struct regmap *regmap;
const struct reset_control_ops *rcops = NULL;
@@ -120,7 +120,7 @@ void mtk_register_reset_controller(struct device_node *np,
if (!desc) {
pr_err("mtk clock reset desc is NULL\n");
- return;
+ return -EINVAL;
}
switch (desc->version) {
@@ -132,18 +132,18 @@ void mtk_register_reset_controller(struct device_node *np,
break;
default:
pr_err("Unknown reset version %d\n", desc->version);
- return;
+ return -EINVAL;
}
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap)) {
pr_err("Cannot find regmap for %pOF: %pe\n", np, regmap);
- return;
+ return -EINVAL;
}
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (!data)
- return;
+ return -ENOMEM;
data->desc = desc;
data->regmap = regmap;
@@ -163,7 +163,10 @@ void mtk_register_reset_controller(struct device_node *np,
if (ret) {
pr_err("could not register reset controller: %d\n", ret);
kfree(data);
+ return ret;
}
+
+ return 0;
}
MODULE_LICENSE("GPL");
diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h
index cc847c67a2fc..260f25f27656 100644
--- a/drivers/clk/mediatek/reset.h
+++ b/drivers/clk/mediatek/reset.h
@@ -56,8 +56,10 @@ struct mtk_clk_rst_data {
* mtk_register_reset_controller - Register MediaTek clock reset controller
* @np: Pointer to device node.
* @desc: Constant pointer to description of clock reset.
+ *
+ * Return: 0 on success and errorno otherwise.
*/
-void mtk_register_reset_controller(struct device_node *np,
- const struct mtk_clk_rst_desc *desc);
+int mtk_register_reset_controller(struct device_node *np,
+ const struct mtk_clk_rst_desc *desc);
#endif /* __DRV_CLK_MTK_RESET_H */
--
2.18.0
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