lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 23 May 2022 09:35:58 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Tomer Maimon <tmaimon77@...il.com>, avifishman70@...il.com,
        tali.perry1@...il.com, joel@....id.au, venture@...gle.com,
        yuenn@...gle.com, benjaminfair@...gle.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
        sboyd@...nel.org, p.zabel@...gutronix.de,
        gregkh@...uxfoundation.org, daniel.lezcano@...aro.org,
        tglx@...utronix.de, wim@...ux-watchdog.org, linux@...ck-us.net,
        catalin.marinas@....com, will@...nel.org, arnd@...db.de,
        olof@...om.net, jirislaby@...nel.org, shawnguo@...nel.org,
        bjorn.andersson@...aro.org, geert+renesas@...der.be,
        marcel.ziswiler@...adex.com, vkoul@...nel.org,
        biju.das.jz@...renesas.com, nobuhiro1.iwamatsu@...hiba.co.jp,
        robert.hancock@...ian.com, j.neuschaefer@....net, lkundrak@...sk
Cc:     soc@...nel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-serial@...r.kernel.org, linux-watchdog@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v1 07/19] dt-binding: clk: npcm845: Add binding for
 Nuvoton NPCM8XX Clock

On 22/05/2022 17:50, Tomer Maimon wrote:
> Nuvoton Arbel BMC NPCM7XX contains an integrated clock controller, which
> generates and supplies clocks to all modules within the BMC.
> 
> Signed-off-by: Tomer Maimon <tmaimon77@...il.com>
> ---
>  .../bindings/clock/nuvoton,npcm845-clk.yaml   | 68 +++++++++++++++++++
>  .../dt-bindings/clock/nuvoton,npcm8xx-clock.h | 50 ++++++++++++++
>  2 files changed, 118 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml
>  create mode 100644 include/dt-bindings/clock/nuvoton,npcm8xx-clock.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml
> new file mode 100644
> index 000000000000..f305c7c7eaf0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,npcm845-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton NPCM8XX Clock Controller Binding
> +
> +maintainers:
> +  - Tomer Maimon <tmaimon77@...il.com>
> +
> +description: |
> +  Nuvoton Arbel BMC NPCM8XX contains an integrated clock controller, which
> +  generates and supplies clocks to all modules within the BMC.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - nuvoton,npcm845-clk
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    description:
> +      specify the external clocks used by the NPCM8XX clock module.

Skip description, it's obvious.

> +    items:
> +      - description: 25M reference clock
> +      - description: CPU reference clock
> +      - description: MC reference clock
> +
> +  clock-names:
> +    description:
> +      specify the external clocks names used by the NPCM8XX clock module.

Skip description, it's obvious.

> +    items:
> +      - const: refclk

Just "ref"

> +      - const: sysbypck
> +      - const: mcbypck

Is "ck" short for "clk"? If yes, then just skip the suffix.

> +
> +  '#clock-cells':
> +    const: 1
> +    description:
> +      See include/dt-bindings/clock/nuvoton,npcm8xx-clock.h for the full
> +      list of NPCM8XX clock IDs.
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  # Clock Control Module node:
> +  - |
> +

No need for blank line.

> +    ahb {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        clk: clock-controller@...01000 {
> +            compatible = "nuvoton,npcm845-clk";
> +            reg = <0x0 0xf0801000 0x0 0x1000>;
> +            #clock-cells = <1>;
> +        };
> +    };
> +
> +...
> diff --git a/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h
> new file mode 100644
> index 000000000000..d76f606bf88b
> --- /dev/null
> +++ b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h

Filename - same as bindings, so nuvoton,npcm845-clk.h

> @@ -0,0 +1,50 @@
> +/* SPDX-License-Identifier: GPL-2.0 */

Dual license, same as bindings.

> +/*
> + * Nuvoton NPCM8xx Clock Generator binding
> + * clock binding number for all clocks supportted by nuvoton,npcm8xx-clk
> + *
> + * Copyright (C) 2021 Nuvoton Technologies tomer.maimon@...oton.com
> + *
> + */
> +
> +#ifndef __DT_BINDINGS_CLOCK_NPCM8XX_H
> +#define __DT_BINDINGS_CLOCK_NPCM8XX_H
> +
> +#define NPCM8XX_CLK_CPU		0
> +#define NPCM8XX_CLK_GFX_PIXEL	1
> +#define NPCM8XX_CLK_MC		2
> +#define NPCM8XX_CLK_ADC		3
> +#define NPCM8XX_CLK_AHB		4
> +#define NPCM8XX_CLK_TIMER	5
> +#define NPCM8XX_CLK_UART	6
> +#define NPCM8XX_CLK_UART2	7
> +#define NPCM8XX_CLK_MMC		8
> +#define NPCM8XX_CLK_SPI3	9
> +#define NPCM8XX_CLK_PCI		10
> +#define NPCM8XX_CLK_AXI		11
> +#define NPCM8XX_CLK_APB4	12
> +#define NPCM8XX_CLK_APB3	13
> +#define NPCM8XX_CLK_APB2	14
> +#define NPCM8XX_CLK_APB1	15
> +#define NPCM8XX_CLK_APB5	16
> +#define NPCM8XX_CLK_CLKOUT	17
> +#define NPCM8XX_CLK_GFX		18
> +#define NPCM8XX_CLK_SU		19
> +#define NPCM8XX_CLK_SU48	20
> +#define NPCM8XX_CLK_SDHC	21
> +#define NPCM8XX_CLK_SPI0	22
> +#define NPCM8XX_CLK_SPI1	23
> +#define NPCM8XX_CLK_SPIX	24
> +#define NPCM8XX_CLK_RG		25
> +#define NPCM8XX_CLK_RCP		26
> +#define NPCM8XX_CLK_PRE_ADC	27
> +#define NPCM8XX_CLK_ATB		28
> +#define NPCM8XX_CLK_PRE_CLK	29
> +#define NPCM8XX_CLK_TH		30
> +#define NPCM8XX_CLK_REFCLK	31
> +#define NPCM8XX_CLK_SYSBYPCK	32
> +#define NPCM8XX_CLK_MCBYPCK	33
> +
> +#define NPCM8XX_NUM_CLOCKS	(NPCM8XX_CLK_MCBYPCK + 1)
> +
> +#endif


Best regards,
Krzysztof

Powered by blists - more mailing lists