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Message-ID: <673f6106-6d0b-f8b8-9127-589d4891f782@microchip.com>
Date: Mon, 23 May 2022 08:10:51 +0000
From: <Claudiu.Beznea@...rochip.com>
To: <herve.codina@...tlin.com>, <gregkh@...uxfoundation.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<mturquette@...libre.com>, <sboyd@...nel.org>,
<Horatiu.Vultur@...rochip.com>
CC: <linux-usb@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH 3/3] ARM: dts: lan966x: Add UDPHS support
On 20.05.2022 18:23, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add UDPHS (the USB High Speed Device Port controller) support.
>
> The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> IP. This IP is also the same as the one present in the SAMA5D3
> SOC.
>
> Signed-off-by: Herve Codina <herve.codina@...tlin.com>
> ---
> arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 7d2869648050..8313e71ecc37 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -211,6 +211,17 @@ can0: can@...1c000 {
> status = "disabled";
> };
>
> + udc: usb@...08000 {
Please keep the nodes ordered by their base addresses. 0xe0808000 is lower
than 0xe081c000 above.
> + compatible = "microchip,lan9662-udc",
> + "atmel,sama5d3-udc";
> + reg = <0x00200000 0x80000>,
> + <0xe0808000 0x400>;
> + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> + clock-names = "pclk", "hclk";
> + status = "disabled";
> + };
> +
> gpio: pinctrl@...04064 {
> compatible = "microchip,lan966x-pinctrl";
> reg = <0xe2004064 0xb4>,
> --
> 2.35.1
>
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