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Message-ID: <20220523093346.28493-11-rex-bc.chen@mediatek.com>
Date: Mon, 23 May 2022 17:33:37 +0800
From: Rex-BC Chen <rex-bc.chen@...iatek.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<matthias.bgg@...il.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>
CC: <p.zabel@...gutronix.de>,
<angelogioacchino.delregno@...labora.com>,
<nfraprado@...labora.com>, <chun-jie.chen@...iatek.com>,
<wenst@...omium.org>, <runyang.chen@...iatek.com>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
Rex-BC Chen <rex-bc.chen@...iatek.com>
Subject: [RESEND v8 10/19] clk: mediatek: reset: Add new register reset function with device
Using device to register reset controller is a better implementation in
current drivers. Howerver, some clock drviers of MediaTek only provide
device_node.
Therefore, we still remain the register reset function with device_node
and add a new function with device to register reset controller.
Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
---
drivers/clk/mediatek/clk-mt2701-eth.c | 2 +-
drivers/clk/mediatek/clk-mt2701-g3d.c | 2 +-
drivers/clk/mediatek/clk-mt2701-hif.c | 2 +-
drivers/clk/mediatek/clk-mt2701.c | 4 +-
drivers/clk/mediatek/clk-mt2712.c | 4 +-
drivers/clk/mediatek/clk-mt7622-eth.c | 2 +-
drivers/clk/mediatek/clk-mt7622-hif.c | 4 +-
drivers/clk/mediatek/clk-mt7622.c | 4 +-
drivers/clk/mediatek/clk-mt7629-eth.c | 2 +-
drivers/clk/mediatek/clk-mt7629-hif.c | 4 +-
drivers/clk/mediatek/clk-mt8183.c | 2 +-
drivers/clk/mediatek/reset.c | 60 +++++++++++++++++++++++++++
drivers/clk/mediatek/reset.h | 10 +++++
13 files changed, 86 insertions(+), 16 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt2701-eth.c b/drivers/clk/mediatek/clk-mt2701-eth.c
index b4e7f38860d0..edf1e2ed2b59 100644
--- a/drivers/clk/mediatek/clk-mt2701-eth.c
+++ b/drivers/clk/mediatek/clk-mt2701-eth.c
@@ -66,7 +66,7 @@ static int clk_mt2701_eth_probe(struct platform_device *pdev)
"could not register clock provider: %s: %d\n",
pdev->name, r);
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
diff --git a/drivers/clk/mediatek/clk-mt2701-g3d.c b/drivers/clk/mediatek/clk-mt2701-g3d.c
index 1431fa76a0f8..1458109d99d9 100644
--- a/drivers/clk/mediatek/clk-mt2701-g3d.c
+++ b/drivers/clk/mediatek/clk-mt2701-g3d.c
@@ -60,7 +60,7 @@ static int clk_mt2701_g3dsys_init(struct platform_device *pdev)
"could not register clock provider: %s: %d\n",
pdev->name, r);
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
diff --git a/drivers/clk/mediatek/clk-mt2701-hif.c b/drivers/clk/mediatek/clk-mt2701-hif.c
index 60bda56a102c..434cbbe8c037 100644
--- a/drivers/clk/mediatek/clk-mt2701-hif.c
+++ b/drivers/clk/mediatek/clk-mt2701-hif.c
@@ -65,7 +65,7 @@ static int clk_mt2701_hif_probe(struct platform_device *pdev)
return r;
}
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return 0;
}
diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
index 6c7a80fb4349..9b442af37e67 100644
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -805,7 +805,7 @@ static int mtk_infrasys_init(struct platform_device *pdev)
if (r)
return r;
- mtk_register_reset_controller(node, &clk_rst_desc[0]);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[0]);
return 0;
}
@@ -928,7 +928,7 @@ static int mtk_pericfg_init(struct platform_device *pdev)
if (r)
return r;
- mtk_register_reset_controller(node, &clk_rst_desc[1]);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[1]);
return 0;
}
diff --git a/drivers/clk/mediatek/clk-mt2712.c b/drivers/clk/mediatek/clk-mt2712.c
index fd310c375fdf..56980dd6c2ea 100644
--- a/drivers/clk/mediatek/clk-mt2712.c
+++ b/drivers/clk/mediatek/clk-mt2712.c
@@ -1379,7 +1379,7 @@ static int clk_mt2712_infra_probe(struct platform_device *pdev)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
- mtk_register_reset_controller(node, &clk_rst_desc[0]);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[0]);
return r;
}
@@ -1401,7 +1401,7 @@ static int clk_mt2712_peri_probe(struct platform_device *pdev)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
- mtk_register_reset_controller(node, &clk_rst_desc[1]);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[1]);
return r;
}
diff --git a/drivers/clk/mediatek/clk-mt7622-eth.c b/drivers/clk/mediatek/clk-mt7622-eth.c
index 90d55f882215..43de0477d5d9 100644
--- a/drivers/clk/mediatek/clk-mt7622-eth.c
+++ b/drivers/clk/mediatek/clk-mt7622-eth.c
@@ -90,7 +90,7 @@ static int clk_mt7622_ethsys_init(struct platform_device *pdev)
"could not register clock provider: %s: %d\n",
pdev->name, r);
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
diff --git a/drivers/clk/mediatek/clk-mt7622-hif.c b/drivers/clk/mediatek/clk-mt7622-hif.c
index 489b64725b22..67e96231dd25 100644
--- a/drivers/clk/mediatek/clk-mt7622-hif.c
+++ b/drivers/clk/mediatek/clk-mt7622-hif.c
@@ -101,7 +101,7 @@ static int clk_mt7622_ssusbsys_init(struct platform_device *pdev)
"could not register clock provider: %s: %d\n",
pdev->name, r);
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
@@ -123,7 +123,7 @@ static int clk_mt7622_pciesys_init(struct platform_device *pdev)
"could not register clock provider: %s: %d\n",
pdev->name, r);
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index 0cba74d38499..3b55f8641fae 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -681,7 +681,7 @@ static int mtk_infrasys_init(struct platform_device *pdev)
if (r)
return r;
- mtk_register_reset_controller(node, &clk_rst_desc[0]);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[0]);
return 0;
}
@@ -732,7 +732,7 @@ static int mtk_pericfg_init(struct platform_device *pdev)
clk_prepare_enable(clk_data->hws[CLK_PERI_UART0_PD]->clk);
- mtk_register_reset_controller(node, &clk_rst_desc[1]);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[1]);
return 0;
}
diff --git a/drivers/clk/mediatek/clk-mt7629-eth.c b/drivers/clk/mediatek/clk-mt7629-eth.c
index 11b346c9d916..282dd6559465 100644
--- a/drivers/clk/mediatek/clk-mt7629-eth.c
+++ b/drivers/clk/mediatek/clk-mt7629-eth.c
@@ -100,7 +100,7 @@ static int clk_mt7629_ethsys_init(struct platform_device *pdev)
"could not register clock provider: %s: %d\n",
pdev->name, r);
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
diff --git a/drivers/clk/mediatek/clk-mt7629-hif.c b/drivers/clk/mediatek/clk-mt7629-hif.c
index c0583043710f..0c8b9e139789 100644
--- a/drivers/clk/mediatek/clk-mt7629-hif.c
+++ b/drivers/clk/mediatek/clk-mt7629-hif.c
@@ -96,7 +96,7 @@ static int clk_mt7629_ssusbsys_init(struct platform_device *pdev)
"could not register clock provider: %s: %d\n",
pdev->name, r);
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
@@ -118,7 +118,7 @@ static int clk_mt7629_pciesys_init(struct platform_device *pdev)
"could not register clock provider: %s: %d\n",
pdev->name, r);
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c
index 5bc738f4d0e7..b1d810f85b71 100644
--- a/drivers/clk/mediatek/clk-mt8183.c
+++ b/drivers/clk/mediatek/clk-mt8183.c
@@ -1256,7 +1256,7 @@ static int clk_mt8183_infra_probe(struct platform_device *pdev)
return r;
}
- mtk_register_reset_controller(node, &clk_rst_desc);
+ mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return r;
}
diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c
index b9718f0f9d16..179505549a7c 100644
--- a/drivers/clk/mediatek/reset.c
+++ b/drivers/clk/mediatek/reset.c
@@ -169,4 +169,64 @@ int mtk_register_reset_controller(struct device_node *np,
return 0;
}
+int mtk_register_reset_controller_with_dev(struct device *dev,
+ const struct mtk_clk_rst_desc *desc)
+{
+ struct device_node *np = dev->of_node;
+ struct regmap *regmap;
+ const struct reset_control_ops *rcops = NULL;
+ struct mtk_clk_rst_data *data;
+ int ret;
+
+ if (!desc) {
+ dev_err(dev, "mtk clock reset desc is NULL\n");
+ return -EINVAL;
+ }
+
+ switch (desc->version) {
+ case MTK_RST_SIMPLE:
+ rcops = &mtk_reset_ops;
+ break;
+ case MTK_RST_SET_CLR:
+ rcops = &mtk_reset_ops_set_clr;
+ break;
+ default:
+ dev_err(dev, "Unknown reset version %d\n", desc->version);
+ return -EINVAL;
+ }
+
+ regmap = device_node_to_regmap(np);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Cannot find regmap %pe\n", regmap);
+ return -EINVAL;
+ }
+
+ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->desc = desc;
+ data->regmap = regmap;
+ data->rcdev.owner = THIS_MODULE;
+ data->rcdev.ops = rcops;
+ data->rcdev.of_node = np;
+ data->rcdev.dev = dev;
+
+ if (data->desc->rst_idx_map_nr > 0) {
+ data->rcdev.of_reset_n_cells = 1;
+ data->rcdev.nr_resets = desc->rst_idx_map_nr;
+ data->rcdev.of_xlate = reset_xlate;
+ } else {
+ data->rcdev.nr_resets = desc->rst_bank_nr * RST_NR_PER_BANK;
+ }
+
+ ret = devm_reset_controller_register(dev, &data->rcdev);
+ if (ret) {
+ dev_err(dev, "could not register reset controller: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
MODULE_LICENSE("GPL");
diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h
index 260f25f27656..f7e1f31e3946 100644
--- a/drivers/clk/mediatek/reset.h
+++ b/drivers/clk/mediatek/reset.h
@@ -62,4 +62,14 @@ struct mtk_clk_rst_data {
int mtk_register_reset_controller(struct device_node *np,
const struct mtk_clk_rst_desc *desc);
+/**
+ * mtk_register_reset_controller - Register mediatek clock reset controller with device
+ * @np: Pointer to device.
+ * @desc: Constant pointer to description of clock reset.
+ *
+ * Return: 0 on success and errorno otherwise.
+ */
+int mtk_register_reset_controller_with_dev(struct device *dev,
+ const struct mtk_clk_rst_desc *desc);
+
#endif /* __DRV_CLK_MTK_RESET_H */
--
2.18.0
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