lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAGdb+H0qnC4noBa_=N3oQW88+dgXYtA7gqJ5qiD2g7Ywd+2K=Q@mail.gmail.com>
Date:   Mon, 23 May 2022 23:59:23 +0800
From:   Sheng Bi <windy.bi.enflame@...il.com>
To:     Lukas Wunner <lukas@...ner.de>
Cc:     Bjorn Helgaas <helgaas@...nel.org>,
        Alex Williamson <alex.williamson@...hat.com>,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] PCI: Fix no-op wait after secondary bus reset

On Mon, May 23, 2022 at 10:20 PM Lukas Wunner <lukas@...ner.de> wrote:
>
> On Sun, May 22, 2022 at 01:37:50AM +0800, Sheng Bi wrote:
> > On Sat, May 21, 2022 at 8:49 PM Lukas Wunner <lukas@...ner.de> wrote:
> > > On Sat, May 21, 2022 at 04:36:10PM +0800, Sheng Bi wrote:
> > > > If so, I also want to align the polling things mentioned in the
> > > > question from Alex, since pci_dev_wait() is also used for reset
> > > > functions other than SBR. To Bjorn, Alex, Lucas, how do you think if
> > > > we need to change the polling in pci_dev_wait() to 20ms intervals, or
> > > > keep binary exponential back-off with probable unexpected extra
> > > > timeout delay.
> > >
> > > The exponential backoff should probably be capped at some point
> > > to avoid excessive wait delays.  I guess the rationale for
> > > exponential backoff is to not poll too frequently.
> > > Capping at 20 msec or 100 msec may be reasonable, i.e.:
> > >
> > > -               delay *= 2;
> > > +               delay = min(delay * 2, 100);
> >
> > Capping at 20 or 100 msec seems reasonable to me. Btw, since 20 msec
> > is not a long time in these scenarios, how about changing to a fixed
> > 20 msec interval?
>
> The callers of pci_dev_wait() seem to wait for the spec-defined
> delay and only call pci_dev_wait() to allow for an additional period
> that non-compliant devices may need.  That extra delay can be expected
> to be low, which is why it makes sense to start with a short poll interval
> and gradually extend it.  So the algorithm seems to be reasonable and
> I wouldn't recommend changing it to a constant interval unless that
> fixes something which is currently broken.
>
> Thanks,
>
> Lukas

Thanks Lukas!

>From my perspective, there is nothing broken so far, but a theoretical
unexpected extra delay while the timeout has passed. So I will keep
pci_dev_wait() as previously with exponential backoff in this patch,
and change the pci_bridge_secondary_bus_wait() with "jiffies" and
pci_dev_wait().

Thanks,

windy

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ