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Message-ID: <e33f91a3eacc4aa3a08e6465fef9265c@AcuMS.aculab.com>
Date:   Mon, 23 May 2022 16:09:20 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Petr Malat' <oss@...at.biz>
CC:     "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "Joern Engel" <joern@...ybastard.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>
Subject: RE: [PATCH] mtd: phram: Map RAM using memremap instead of ioremap

From: Petr Malat
> Sent: 23 May 2022 16:28
> 
> Hi!
> 
> On Mon, May 23, 2022 at 02:51:41PM +0000, David Laight wrote:
> > From: Petr Malat
> > > Sent: 23 May 2022 15:28
> > >
> > > One can't use memcpy on memory obtained by ioremap, because IO memory
> > > may have different alignment and size access restriction than the system
> > > memory. Use memremap as phram driver operates on RAM.
> >
> > Does that actually help?
> > The memcpy() is still likely to issue unaligned accesses
> > that the hardware can't handle.
> 
> Yes, it solves the issue. Memcpy can cause unaligned access only on
> platforms, which can handle it. And on ARM64 it's handled only for
> RAM and not for a device memory (__pgprot(PROT_DEVICE_*)).

Does mapping it as memory cause it to be cached?
So the hardware only sees cache line reads (which are aligned)
and the cpu support for misaligned memory accesses then
stop the faults?

On x86 (which I know a lot more about) memcpy() has a nasty
habit of getting implemented as 'rep movsb' relying on the
cpu to speed it up.
But that doesn't happen for uncached addresses - so you get
very slow byte copies.
OTOH misaligned PCIe transfers generate TLP that have the
correct byte enables for the end words.
Provided the PCIe target isn't broken they are fine.

	David

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