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Message-ID: <20220525053642.29653-1-yf.wang@mediatek.com>
Date:   Wed, 25 May 2022 13:36:42 +0800
From:   <yf.wang@...iatek.com>
To:     <yong.wu@...iatek.com>
CC:     <Libo.Kang@...iatek.com>, <iommu@...ts.linux-foundation.org>,
        <joro@...tes.org>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>, <matthias.bgg@...il.com>,
        <ning.li@...iatek.com>, <robin.murphy@....com>, <will@...nel.org>,
        <wsd_upstream@...iatek.com>, <yf.wang@...iatek.com>
Subject: Re: [PATCH v5 2/2] iommu/mediatek: Allow page table PA up to 35bit

On Thu, 2022-05-19 at 14:58 +0800, Yong Wu wrote:
> On Mon, 2022-05-16 at 22:16 +0800, yf.wang@...iatek.com wrote:
> > From: Yunfei Wang <yf.wang@...iatek.com>
> > 
> > Add the quirk IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT support, so that
> > allows
> > page table PA up to 35bit, not only in ZONE_DMA32.
> 
> Comment why this is needed.
> 
> e.g. For single normal zone.
> 

Hi Yong,

There is no DMA32 zone in some mediatek smartphone chip for single normal zone.

The level 1 and level 2 pgtable are both allocated in ZONE_DMA32, and may have two possible problem:
1.The level 2 pgtable is allocated in ZONE_DMA32 with atomic flag, and it may fail if ZONE_DMA32 memory is used out.
2.Single memory feature will make ZONE_DMA32 empty, and cause level 1 and level 2 pgtable PA more than 32bit.

Solution:
Add the quirk IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT support, so that level 1 and level 2 pgtable can support at most 35bit PA.

I will update the commit message in next version.

Thanks,
Yunfei.

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