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Message-ID: <20220525093938.4101-1-ravi.bangoria@amd.com>
Date: Wed, 25 May 2022 15:09:25 +0530
From: Ravi Bangoria <ravi.bangoria@....com>
To: <peterz@...radead.org>, <acme@...nel.org>
CC: <ravi.bangoria@....com>, <jolsa@...nel.org>, <namhyung@...nel.org>,
<eranian@...gle.com>, <irogers@...gle.com>, <jmario@...hat.com>,
<leo.yan@...aro.org>, <alisaidi@...zon.com>, <ak@...ux.intel.com>,
<kan.liang@...ux.intel.com>, <dave.hansen@...ux.intel.com>,
<hpa@...or.com>, <mingo@...hat.com>, <mark.rutland@....com>,
<alexander.shishkin@...ux.intel.com>, <tglx@...utronix.de>,
<bp@...en8.de>, <x86@...nel.org>,
<linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<sandipan.das@....com>, <ananth.narayan@....com>,
<kim.phillips@....com>, <santosh.shukla@....com>
Subject: [PATCH 00/13] perf mem/c2c: Add support for AMD
Perf mem and c2c tools are wrappers around perf record with mem load/
store events. IBS tagged load/store sample provides most of the
information needed for these tools. Enable support for these tools on
AMD Zen processors based on IBS Op pmu.
There are some limitations though: Only load/store instructions provide
mem/c2c information. However, IBS does not provide a way to choose a
particular type of instruction to tag. This results in many non-LS
instructions being tagged which appear as N/A. IBS, being an uncore pmu
from kernel point of view[1], does not support per process monitoring.
Thus, perf mem/c2c on AMD are currently supported in per-cpu mode only.
Example:
$ sudo ./perf mem record -- -c 10000
^C[ perf record: Woken up 227 times to write data ]
[ perf record: Captured and wrote 58.760 MB perf.data (836978 samples) ]
$ sudo ./perf mem report -F mem,sample,snoop
Samples: 836K of event 'ibs_op//', Event count (approx.): 8418762
Memory access Samples Snoop
N/A 700620 N/A
L1 hit 126675 N/A
L2 hit 424 N/A
L3 hit 664 HitM
L3 hit 10 N/A
Local RAM hit 2 N/A
Remote RAM (1 hop) hit 8558 N/A
Remote Cache (1 hop) hit 3 N/A
Remote Cache (1 hop) hit 2 HitM
Remote Cache (2 hops) hit 10 HitM
Remote Cache (2 hops) hit 6 N/A
Uncached hit 4 N/A
[1]: https://lore.kernel.org/lkml/20220113134743.1292-1-ravi.bangoria@amd.com
Prepared on tip/perf/core (bae19fdd7e9e)
Ravi Bangoria (13):
perf/mem: Introduce PERF_MEM_LVLNUM_{EXTN_MEM|IO}
perf/x86/amd: Add IBS OP_DATA2/3 register bit definitions
perf/x86/amd: Support PERF_SAMPLE_DATA_SRC based on IBS_OP_DATA*
perf/x86/amd: Support PERF_SAMPLE_WEIGHT using IBS
OP_DATA3[IbsDcMissLat]
perf/x86/amd: Support PERF_SAMPLE_ADDR using IBS_DC_LINADDR
perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR using IBS_DC_PHYSADDR
perf tool: Sync include/uapi/linux/perf_event.h header
perf tool: Sync arch/x86/include/asm/amd-ibs.h header
perf mem: Add support for printing PERF_MEM_LVLNUM_{EXTN_MEM|IO}
perf mem/c2c: Set PERF_SAMPLE_WEIGHT for LOAD_STORE events
perf mem/c2c: Add load store event mappings for AMD
perf mem/c2c: Avoid printing empty lines for unsupported events
perf mem: Use more generic term for LFB
arch/x86/events/amd/ibs.c | 351 ++++++++++++++++++++++-
arch/x86/include/asm/amd-ibs.h | 76 +++++
include/uapi/linux/perf_event.h | 4 +-
tools/arch/x86/include/asm/amd-ibs.h | 76 +++++
tools/include/uapi/linux/perf_event.h | 4 +-
tools/perf/Documentation/perf-c2c.txt | 14 +-
tools/perf/Documentation/perf-mem.txt | 3 +-
tools/perf/Documentation/perf-record.txt | 1 +
tools/perf/arch/x86/util/mem-events.c | 31 +-
tools/perf/builtin-c2c.c | 1 +
tools/perf/builtin-mem.c | 1 +
tools/perf/util/mem-events.c | 17 +-
12 files changed, 557 insertions(+), 22 deletions(-)
--
2.31.1
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