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Message-ID: <09b050e3-b8e2-fc58-c4cf-e1c81c5eac84@canonical.com>
Date: Wed, 25 May 2022 17:17:17 +0200
From: Heinrich Schuchardt <heinrich.schuchardt@...onical.com>
To: Sunil V L <sunilvl@...tanamicro.com>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-efi@...r.kernel.org, Sunil V L <sunil.vl@...il.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Thomas Gleixner <tglx@...utronix.de>,
Atish Patra <atishp@...osinc.com>,
Anup Patel <apatel@...tanamicro.com>,
Marc Zyngier <maz@...nel.org>,
Ard Biesheuvel <ardb@...nel.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Palmer Dabbelt <palmer@...belt.com>
Subject: Re: [PATCH 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid
On 5/25/22 17:11, Sunil V L wrote:
> The hartid can be a 64bit value on RV64 platforms. This patch modifies
> the hartid variable type to unsigned long so that it can hold 64bit
> value on RV64 platforms.
>
> Signed-off-by: Sunil V L <sunilvl@...tanamicro.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@...onical.com>
> ---
> arch/riscv/kernel/cpu_ops_sbi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c
> index 4f5a6f84e2a4..efa0f0816634 100644
> --- a/arch/riscv/kernel/cpu_ops_sbi.c
> +++ b/arch/riscv/kernel/cpu_ops_sbi.c
> @@ -65,7 +65,7 @@ static int sbi_hsm_hart_get_status(unsigned long hartid)
> static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle)
> {
> unsigned long boot_addr = __pa_symbol(secondary_start_sbi);
> - int hartid = cpuid_to_hartid_map(cpuid);
> + unsigned long hartid = cpuid_to_hartid_map(cpuid);
> unsigned long hsm_data;
> struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid);
>
> @@ -107,7 +107,7 @@ static void sbi_cpu_stop(void)
> static int sbi_cpu_is_stopped(unsigned int cpuid)
> {
> int rc;
> - int hartid = cpuid_to_hartid_map(cpuid);
> + unsigned long hartid = cpuid_to_hartid_map(cpuid);
>
> rc = sbi_hsm_hart_get_status(hartid);
>
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