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Message-ID: <CAOnJCU+a7fHisvS55Kj2=4pGapxtf8SvaPZmcnvy16M32tRztw@mail.gmail.com>
Date: Thu, 26 May 2022 15:57:46 -0700
From: Atish Patra <atishp@...shpatra.org>
To: Sunil V L <sunilvl@...tanamicro.com>
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ard Biesheuvel <ardb@...nel.org>,
Marc Zyngier <maz@...nel.org>,
Atish Patra <atishp@...osinc.com>,
Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
Anup Patel <apatel@...tanamicro.com>,
linux-riscv <linux-riscv@...ts.infradead.org>,
"linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
linux-efi <linux-efi@...r.kernel.org>,
Sunil V L <sunil.vl@...il.com>
Subject: Re: [PATCH V2 3/5] riscv: smp: Support for 64bit hartid
On Thu, May 26, 2022 at 3:12 AM Sunil V L <sunilvl@...tanamicro.com> wrote:
>
> The hartid can be a 64bit value on RV64 platforms. This patch
> modifies the hartid parameter in riscv_hartid_to_cpuid() as
> unsigned long so that it can hold 64bit value on RV64 platforms.
>
> Signed-off-by: Sunil V L <sunilvl@...tanamicro.com>
> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@...onical.com>
> ---
> arch/riscv/include/asm/smp.h | 4 ++--
> arch/riscv/kernel/smp.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
> index 23170c933d73..d3443be7eedc 100644
> --- a/arch/riscv/include/asm/smp.h
> +++ b/arch/riscv/include/asm/smp.h
> @@ -42,7 +42,7 @@ void arch_send_call_function_ipi_mask(struct cpumask *mask);
> /* Hook for the generic smp_call_function_single() routine. */
> void arch_send_call_function_single_ipi(int cpu);
>
> -int riscv_hartid_to_cpuid(int hartid);
> +int riscv_hartid_to_cpuid(unsigned long hartid);
>
> /* Set custom IPI operations */
> void riscv_set_ipi_ops(const struct riscv_ipi_ops *ops);
> @@ -70,7 +70,7 @@ static inline void show_ipi_stats(struct seq_file *p, int prec)
> {
> }
>
> -static inline int riscv_hartid_to_cpuid(int hartid)
> +static inline int riscv_hartid_to_cpuid(unsigned long hartid)
> {
> if (hartid == boot_cpu_hartid)
> return 0;
> diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
> index b5d30ea92292..018e7dc45df6 100644
> --- a/arch/riscv/kernel/smp.c
> +++ b/arch/riscv/kernel/smp.c
> @@ -47,7 +47,7 @@ static struct {
> unsigned long bits ____cacheline_aligned;
> } ipi_data[NR_CPUS] __cacheline_aligned;
>
> -int riscv_hartid_to_cpuid(int hartid)
> +int riscv_hartid_to_cpuid(unsigned long hartid)
> {
> int i;
>
> @@ -55,7 +55,7 @@ int riscv_hartid_to_cpuid(int hartid)
> if (cpuid_to_hartid_map(i) == hartid)
> return i;
>
> - pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
> + pr_err("Couldn't find cpu id for hartid [%lu]\n", hartid);
> return -ENOENT;
> }
>
> --
> 2.25.1
>
Reviewed-by: Atish Patra <atishp@...osinc.com>
--
Regards,
Atish
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